EEWORLDEEWORLDEEWORLD

Part Number

Search

54121-410340850LF

Description
Board Connector, 34 Contact(s), 1 Row(s), Male, Straight, 0.1 inch Pitch, Solder Terminal, Locking, Black Insulator, Receptacle
CategoryThe connector    The connector   
File Size101KB,1 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Environmental Compliance
Download Datasheet Parametric View All

54121-410340850LF Overview

Board Connector, 34 Contact(s), 1 Row(s), Male, Straight, 0.1 inch Pitch, Solder Terminal, Locking, Black Insulator, Receptacle

54121-410340850LF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerAmphenol
Reach Compliance Codecompliant
body width0.094 inch
subject depth0.335 inch
body length3.4 inch
Body/casing typeRECEPTACLE
Connector typeBOARD CONNECTOR
Contact to complete cooperationSN ON NI
Contact completed and terminatedMatte Tin (Sn) - with Nickel (Ni) barrier
Contact point genderMALE
Contact materialPHOSPHOR BRONZE
contact modeRECTANGULAR
Contact styleSQ PIN-SKT
Insulation resistance5000000000 Ω
Insulator colorBLACK
insulator materialTHERMOPLASTIC
JESD-609 codee3
Manufacturer's serial number54121
Plug contact pitch0.1 inch
Installation option 1LOCKING
Installation methodSTRAIGHT
Installation typeBOARD
Number of connectorsONE
PCB row number1
Number of rows loaded1
Maximum operating temperature125 °C
Minimum operating temperature-65 °C
PCB contact patternRECTANGULAR
Plating thickness79u inch
Rated current (signal)3 A
GuidelineUL, CSA
reliabilityCOMMERCIAL
Terminal length0.095 inch
Terminal pitch2.54 mm
Termination typeSOLDER
Total number of contacts34
PDM: Rev:G
STATUS:
Released
Printed: Mar 10, 2011
.
Questions about using QuartusII for simulation? ? ? ? ? ?
I encountered a strange problem today: when using Quartus II for simulation , the waveform never shows the clock , only the level. However, the program is sure that the clock type is set correctly, an...
eeleader FPGA/CPLD
What to do if garbled characters appear on your computer
[i=s] This post was last edited by xiaomaoge on 2017-11-4 11:26 [/i] What to do if garbled characters appear on your computer...
xiaomaoge Talking
Four common ideas and techniques for FPGA/DSP design
This article discusses four common FPGA/DSP design ideas and techniques: ping-pong operation, serial-to-parallel conversion, pipeline operation, and data interface synchronization. They are all manife...
Aguilera Microcontroller MCU
Born only for uC, uS growth process 4
Last night I spent a lot of time doing a series of tests on overhead. We can draw a conclusion that we are very concerned about: That is, compared with the usual direct call of variables and functions...
辛昕 Programming Basics
EEWORLD University ---- Webench Power Supply Design Training Video Series
Webench Power Design Training Series Videos : https://training.eeworld.com.cn/course/4004...
hi5 Power technology
Making a CPU out of a bunch of switches?
We turn lights on and off almost every day, but this simple switch is the basic unit that makes up the CPU. Share this article and see how to build the CPU, a switch world that is either 0 or 1. From ...
可乐zzZ PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2585  2745  59  2672  1159  53  56  2  54  24 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号