16CV8 datasheet, PDF - EEWORLD Datasheet

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16CV8: DescriptionCMOS Programmable Electrically Erasable Logic Device; File Size112KB，10 Pages; ManufacturerETC2

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16CV8 Overview

CMOS Programmable Electrically Erasable Logic Device

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Commercial

PEEL™ 16CV8 -25

CMOS Programmable Electrically Erasable Logic Device

Features

•

Compatible with Popular 16V8 Devices

- 16V8 socket and function compatible

- Programs with standard 16V8 JEDEC file

- 20-pin DIP, SOIC, TSSOP, and PLCC

CMOS Electrically Erasable Technology

- Superior factory testing

- Reprogrammable in plastic package

- Reduces retrofit and development costs

Application Versatility

- Replaces random logic

- Super sets standard 20-pin PLDs (PALs)

•

Multiple Speed, Power Options

- Speeds range 25ns

- Power as low as 37mA @ 25mHZ

Development / Programmer Support

- Third party software and programmers

- ICT PLACE Development Software

- Automatic programmer translation and JEDEC file translation

software available for the most popular PAL devices

General Description

The PEEL

16CV8 is a Programmable Electrically Erasable Logic

(PEEL) device providing an attractive alternative to ordinary PLDs. The

PEEL

16CV8 offers the performance, flexibility, ease of design and

production practicality needed by logic designers today.

The PEEL

16CV8 is available in 20-pin DIP, PLCC, SOIC and TSSOP

packages (see Figure 1) with 25ns speed and power consumption as

low as 37mA. EE-Reprogrammability provides the convenience of

instant reprogramming for development and reusable production inven-

tory minimizing the impact of programming changes or errors. EE-

Reprogrammability also improves factory testability, thus assuring the

highest quality possible.

The PEEL

16CV8 architecture allows it to replace over standard 20-

pin PLDs (PAL, GAL, EPLD etc.). See Figure 2. ICT’s PEEL

16CV8

can be programmed with existing 16CV8 JEDEC file. Some program-

mers also allow the PEEL

16CV8 to be programmed directly from

PLD 16L8, 16R4, 16R6 and 16R8 JEDEC files. Additional development

and programming support for the PEEL

16CV8 is provided by popular

third-party programmers and development software. ICT also offers free

PLACE development software.

Figure 1 - Pin Configuration

I/CLK1

GND

I/O

I/CLK1

GND

I/O

Figure 2 - Block Diagram

CLK

/CLK

PEEL

"AND"

ARRAY

64 TERMS

32 INPUTS

MACRO

CELL

DIP

I/CLK1

VCC

I/O

TSSOP

I/OE

I/O

3 2 1 20 19

9 10 11 12 13

I/O

I/CLK1

GND

I/O

GND

I/O

PLCC-J

I/O

SOIC

04-02-004I

16CV8 Related Products

	16CV8	16CV8-25	16CV8J-25	16CV8P-25	16CV8S-25	16CV8T-25
Description	CMOS Programmable Electrically Erasable Logic Device	CMOS Programmable Electrically Erasable Logic Device	CMOS Programmable Electrically Erasable Logic Device	CMOS Programmable Electrically Erasable Logic Device	CMOS Programmable Electrically Erasable Logic Device	CMOS Programmable Electrically Erasable Logic Device

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