TI32032TFKL2 datasheet, PDF - EEWORLD Datasheet

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TI32032TFKL2: Description32-BIT, 10MHz, MICROPROCESSOR, CQCC68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size536KB，19 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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TI32032TFKL2 Overview

32-BIT, 10MHz, MICROPROCESSOR, CQCC68

TI32032TFKL2 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Texas Instruments
package instruction	QCCN, LCC68,.95SQ
Reach Compliance Code	_compli
ECCN code	3A001.A.2.C
Address bus width	24
bit size	32
boundary scan	NO
maximum clock frequency	10 MHz
External data bus width	32
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	S-CQCC-N68
low power mode	NO
Number of DMA channels
Number of external interrupt devices	2
Number of serial I/Os
Number of terminals	68
On-chip data RAM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Encapsulate equivalent code	LCC68,.95SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
RAM (number of words)	0
speed	10 MHz
Maximum slew rate	300 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	NMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR

TI32032TFKL2 Related Products

	TI32032TFKL2	TI32032TGBL2	TI32032TFNL2
Description	32-BIT, 10MHz, MICROPROCESSOR, CQCC68	32-BIT, 10MHz, MICROPROCESSOR, CPGA68	32-BIT, 10MHz, MICROPROCESSOR, PQCC68
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	Texas Instruments	Texas Instruments	Texas Instruments
Reach Compliance Code	_compli	not_compliant	not_compliant
ECCN code	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
Address bus width	24	24	24
bit size	32	32	32
boundary scan	NO	NO	NO
maximum clock frequency	10 MHz	10 MHz	10 MHz
External data bus width	32	32	32
Format	FIXED POINT	FIXED POINT	FIXED POINT
Integrated cache	NO	NO	NO
JESD-30 code	S-CQCC-N68	S-CPGA-P68	S-PQCC-J68
low power mode	NO	NO	NO
Number of external interrupt devices	2	2	2
Number of terminals	68	68	68
Maximum operating temperature	70 °C	70 °C	70 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY
encapsulated code	QCCN	PGA	QCCJ
Encapsulate equivalent code	LCC68,.95SQ	PGA68,11X11	LDCC68,1.0SQ
Package shape	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	GRID ARRAY	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Certification status	Not Qualified	Not Qualified	Not Qualified
speed	10 MHz	10 MHz	10 MHz
Maximum slew rate	300 mA	300 mA	300 mA
Maximum supply voltage	5.25 V	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V	5 V
surface mount	YES	NO	YES
technology	NMOS	NMOS	NMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	PIN/PEG	J BEND
Terminal pitch	1.27 mm	2.54 mm	1.27 mm
Terminal location	QUAD	PERPENDICULAR	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR
package instruction	QCCN, LCC68,.95SQ	-	QCCJ, LDCC68,1.0SQ

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