Ordering Information .................................................................................................................................................................... 2
7.1. User Programming Interface ..................................................................................................................................... 19
7.2. Start-up output frequency and signaling types .......................................................................................................... 19
8.1. Any-frequency function ............................................................................................................................................. 20
9 I C/SPI Control Registers...................................................................................................................................................... 29
9.1. Register Address: 0x00. DCO Frequency Control Least Significant Word (LSW) .................................................... 29
9.2. Register Address: 0x01. OE Control, DCO Frequency Control Most Significant Word (MSW) ................................. 30
9.3. Register Address: 0x02. DCO PULL RANGE CONTROL ........................................................................................ 31
9.4. Register Address: 0x03. Flac-N PLL Integer Value and Flac-N PLL Fraction MSW ................................................. 32
9.6. Register Address: 0x05. PostDiv, Driver Control ...................................................................................................... 33
9.7. Register Address: 0x06. mDriver, Driver Control ...................................................................................................... 34
2
10 I C Operation ........................................................................................................................................................................ 35
2
10.1. I C protocol ............................................................................................................................................................... 35
2
10.2. I C Timing Specification ............................................................................................................................................ 37
2
10.3. I C Device Address Modes ....................................................................................................................................... 38
Dimensions and Patterns ........................................................................................................................................................... 45
Additional Information ................................................................................................................................................................ 46
Revision History ......................................................................................................................................................................... 47
Rev 0.991
Page 3 of 47
www.sitime.com
SiT3521
1 to 340 MHz Elite™ I
2
C/SPI Programmable Oscillator
1 Electrical Characteristics
PRELIMINARY
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with
standard output terminations shown in the termination diagrams. Typical values are at 25°C and nominal supply voltage.
Table 1. Electrical Characteristics – Common to LVPECL, LVDS and HCSL
Parameter
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
1
-10
-20
-25
-50
First Year Aging
Operating Temperature Range
F_1y
T_use
–
-20
-40
-40
Supply Voltage
Vdd
2.97
2.7
2.52
2.25
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
Duty Cycle
Start-up Time
Output Enable/Disable Time –
Hardware control via OE pin
Output Enable/Disable Time –
Software control via I
2
C/SPI
VIH
VIL
Z_in
DC
T_start
T_oe_hw
70%
–
–
45
–
–
Typ.
–
–
–
–
–
±1
–
–
–
3.3
3.0
2.8
2.5
–
–
100
–
–
–
Max.
340
+10
+20
+25
+50
–
+70
+85
+105
Supply Voltage
3.63
3.3
3.08
2.75
–
30%
–
55
3.0
3.8
V
V
V
V
Vdd
Vdd
kΩ
%
ms
µs
Measured from the time Vdd reaches its rated minimum value
Measured from the time OE pin reaches rated VIH and VIL to
the time clock pins reach 90% of swing and high-Z.
See
Figure 9
and
Figure 10
Measured from the time the last byte of command is
transmitted via I
2
C/SPI (reg1) to the time clock pins reach 90%
of swing and high-Z. See
Figure 30
and
Figure 31
OE pin
OE pin
OE pin, logic high or logic low
Unit
MHz
ppm
ppm
ppm
ppm
ppm
°C
°C
°C
1 -year aging at 25°C
Extended Commercial
Industrial
Extended Industrial. Available only for I C operation, not SPI.
2
st
Condition
Factory or user programmable, accurate to 6 decimal places
Inclusive of initial tolerance, operating temperature, rated
power supply voltage and load variations.
Frequency Range
Frequency Stability
Temperature Range
Input Characteristics – OE Pin
Output Characteristics
Startup and Output Enable/Disable Timing
T_oe_sw
–
–
6.5
µs
Rev 0.991
Page 4 of 47
www.sitime.com
SiT3521
1 to 340 MHz Elite™ I
2
C/SPI Programmable Oscillator
Table 2. Electrical Characteristics – LVPECL Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
PRELIMINARY
Condition
Current Consumption
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Idd
I_OE
I_leak
I_driver
–
–
–
–
–
–
0.15
–
89
58
–
32
mA
mA
A
mA
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
Output Characteristics
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
VOH
VOL
V_Swing
Tr, Tf
Vdd - 1.1V
Vdd - 1.9V
1.2
–
–
–
1.6
225
Vdd - 0.7V
Vdd - 1.5V
2.0
290
Jitter
RMS Phase Jitter (random) –
DCO Mode Only
T_phj
–
–
RMS Phase Jitter (random) –
Any-frequency Mode Only
T_phj
–
–
RMS Period Jitter
[3]
Note:
3. Measured according to JESD65B.
T_jitt
–
0.225
0.1
0.225
0.11
1
0.340
0.14
0.340
0.15
1.6
ps
ps
ps
ps
ps
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3V or 2.5V
V
V
V
ps
See
Figure 5
See
Figure 5
See
Figure 6
20% to 80%, see
Figure 6
Table 3. Electrical Characteristics – LVDS Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Current Consumption
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Idd
I_OE
I_leak
–
–
–
–
–
0.15
80
61
–
mA
mA
A
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Output Characteristics
Differential Output Voltage
Delta VOD
Offset Voltage
Delta VOS
Rise/Fall Time
VOD
ΔVOD
VOS
ΔVOS
Tr, Tf
250
–
1.125
–
–
–
–
–
–
400
455
50
1.375
50
470
Jitter
RMS Phase Jitter (random) –
DCO Mode Only
T_phj
–
–
RMS Phase Jitter (random) –
Any-frequency Mode Only
T_phj
–
–
RMS Period Jitter
[4]
Note:
4. Measured according to JESD65B.
T_jitt
–
0.21
0.1
0.21
0.1
1
0.275
0.12
0.367
0.12
1.6
ps
ps
ps
ps
ps
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3V or 2.5V
mV
mV
V
mV
ps
f = 156.25MHz See
Figure 7
See
Figure 7
See
Figure 7
See
Figure 7
Measured with 2 pF capacitive loading to GND, 20% to 80%,
[font=微软雅黑][size=3]At the beginning of next month, EEworld will go to Japan to attend the [url=http://www.ceatec.com/en/]CEATEC 2015 Tokyo International Electronics Show[/url], and will interview Rohm...
[align=center][size=6]My 25-year embedded career[/size][/align] [align=center][size=6]Zhou Ligong[/size][/align] The editor of "Programmer" magazine asked me to write a topic essay. I thought about it...
I would like to ask if you have any information on how to convert serial to parallel port. I want to make a serial to parallel port interface card. It is too expensive to buy one. Thank you! My email ...
I hope the adults can explain to me the internal structure of the 51 MCU, the mapping diagram, how the program is executed, how the flash and RAM are switched, and how the CPU distinguishes between co...
I am a network administrator of a company. I have about 1,000 machines. I want to count how many computers there are in each branch. Is there any relevant software to check? I know that some software ...
High efficiency and low standby power consumption are two major challenges in today's switching power supply design. Resonant topology or LLC topology is becoming increasingly popular because it ca...[Details]
At present, the development of wireless power supply technology for electric vehicles (EVs) is becoming more and more active. In 2012, Volvo of Sweden established Volvo Technology Japan in Tokyo as...[Details]
Traditional broadcasting systems generally need to be operated manually at a fixed time, and can only realize one-way broadcasting with few functions. Traditional bell ringing equipment has a singl...[Details]
1 Introduction
A wide variety of communication cables and control cables are widely used in various instruments and control equipment. Whether the cable is well-conducted and
whether
th...[Details]
1. Circuit composition
The whole circuit consists of two parts:
1. Power saving control circuit
As shown in the figure below. Including delay circuit and drive circuit.
(1) Delay ci...[Details]
1. Introduction
With the growth of parking demand, the scale of parking lots is becoming larger and larger. A lot of research has been done on intelligent parking lots in China, but most of th...[Details]
Automotive applications are particularly sensitive to EMI events, which are unavoidable in a noisy electrical environment consisting of a central battery, bundled wiring harnesses, various inductiv...[Details]
Converged processors meet scalability requirements
In current embedded system design, solutions based on MCU, DSP, FPGA and ASIC account for more than 90% of the market share. These solutions ...[Details]
System design is a complex process. It is not enough to just use ICs. There are many details to consider. This article uses a high-fidelity music playback system as an example to introduce how to s...[Details]
In order to highlight the concept of "energy saving and environmental protection" of intelligent buildings, solar street lights are designed for intelligent communities. The inclination and capacit...[Details]
1 Introduction
As an emerging microfabrication technology, micro-electromechanical system (MEMS) technology has begun to be applied in various fields. It can integrate functions such as inform...[Details]
Although it is relatively easy to check the stability of a simple amplifier at lower frequencies, it may be much more difficult to evaluate the stability of a more complex circuit. This artic...[Details]
With the development and widespread application of computer technology, especially in the field of industrial control, computer communication is particularly important. Although serial communication g...[Details]
MediaTek (2454) announced the acquisition of F-MStar (3697) and attracted the attention of IC design industry. This morning, Gartner Semiconductor Industry Research Director Hong Cenwei analyzed ...[Details]
Flooded Batteries
This battery developed in Germany can be used to power flashlights, strobe lights and toys as long as it is filled with water. This battery can be stored for 50 years and can...[Details]
Talking
京公网安备 11010802033920号
EEWORLD
