M312L5720CZ0-CA2 datasheet, PDF

M312L5720CZ0-CA2: DescriptionDDR DRAM Module, 256MX72, 0.75ns, CMOS, DIMM-184; Categorystorage storage; File Size574KB，28 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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M312L5720CZ0-CA2 Overview

DDR DRAM Module, 256MX72, 0.75ns, CMOS, DIMM-184

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	SAMSUNG
Parts packaging code	DIMM
package instruction	DIMM, DIMM184
Contacts	184
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	0.75 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	133 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N184
memory density	19327352832 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	184
word count	268435456 words
character code	256000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256MX72
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM184
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

512MB, 1GB, 2GB Registered DIMM

Preliminary

DDR SDRAM

DDR SDRAM Registered Module

184pin Registered Module based on 512Mb C-die

with 72-bit ECC

66 TSOP-II and 60 ball FBGA with Pb-Free

(RoHS compliant)

Revision 0.0

September. 2004

Rev. 0.0 September, 2004

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