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DA14580-01UNA-1000

Description
LOW POWER BLUETOOTH SMART SOC
File Size1MB,155 Pages
ManufacturerDialog Semiconductor
Download Datasheet Parametric View All

DA14580-01UNA-1000 Overview

LOW POWER BLUETOOTH SMART SOC

DA14580-01UNA-1000 Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
Part StatusActive
TypeIC
Protocols SupportedBluetooth v4.1 (BLE)
Processing Unit TypeMicroprocessor
Power ClassClass II
Typical Sensitivity (dBm)-93
Interface TypeGPIO/I2C/SPI/UART
Minimum Operating Supply Voltage (V)0.9
Maximum Operating Supply Voltage (V)3.3
Antenna MountingExternal
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)85
PackagingTape and Reel
Supplier PackageWLCSP
Pin Count34
Standard Package NameBGA
MountingSurface Mount
Package Height0.32
Package Length2.44
Package Width2.44
PCB changed34
Lead ShapeBall
DA14580
Bluetooth Low Energy 4.2 SoC
General Description
The DA14580 integrated circuit has a fully integrated
radio transceiver and baseband processor for
Blue-
tooth
®
low energy.
It can be used as a standalone
application processor or as a data pump in hosted sys-
tems.
The DA14580 supports a flexible memory architecture
for storing Bluetooth profiles and custom application
code, which can be updated over the air (OTA). The
qualified
Bluetooth low energy
protocol stack is stored
in a dedicated ROM. All software runs on the ARM
®
Cortex
®
-M0 processor via a simple scheduler.
The
Bluetooth low energy
firmware includes the
L2CAP service layer protocols, Security Manager
(SM), Attribute Protocol (ATT), the Generic Attribute
Profile (GATT) and the Generic Access Profile (GAP).
All profiles published by the Bluetooth SIG as well as
custom profiles are supported.
The transceiver interfaces directly to the antenna and
is fully compliant with the
Bluetooth 4.2
standard.
The DA14580 has dedicated hardware for the Link
Layer implementation of
Bluetooth low energy
and
interface controllers for enhanced connectivity capabili-
ties.
FINAL
Features
Complies with
Bluetooth
V4.2, ETSI EN 300 328 and
EN 300 440 Class 2 (Europe), FCC CFR47 Part 15
(US) and ARIB STD-T66 (Japan)
Processing power
16 MHz 32 bit ARM Cortex-M0 with SWD inter-
face
Dedicated Link Layer Processor
AES-128 bit encryption Processor
Memories
32 kB One-Time-Programmable (OTP) memory
________________________________________________________________________________________________
42 kB System SRAM
84 kB ROM
8 kB Retention SRAM
Power management
Integrated Buck/Boost DC-DC converter
P0, P1, P2 and P3 ports with 3.3 V tolerance
Easy decoupling of only 4 supply pins
Supports coin (typ. 3.0 V) and alkaline (typ. 1.5 V)
battery cells
10-bit ADC for battery voltage measurement
Digital controlled oscillators
16 MHz crystal (±20 ppm max) and RC oscillator
32 kHz crystal (±50 ppm, ±500 ppm max) and
RCX oscillator
General purpose, Capture and Sleep timers
Digital interfaces
General purpose I/Os: 14 (WLCSP34 package),
24 (QFN40 package), 32 (QFN48 package)
2 UARTs with hardware flow control up to 1 MBd
SPI+™ interface
I2C bus at 100 kHz, 400 kHz
3-axes capable Quadrature Decoder
Analog interfaces
4-channel 10-bit ADC
Radio transceiver
Fully integrated 2.4 GHz CMOS transceiver
Single wire antenna: no RF matching or RX/TX
switching required
Supply current at VBAT3V:
TX: 3.4 mA, RX: 3.7 mA (with ideal DC-DC)
0 dBm transmit output power
-20 dBm output power in “Near Field Mode”
-93 dBm receiver sensitivity
Packages:
WLCSP 34 pins, 2.436 mm x 2.436 mm
QFN 40 pins, 5 mm x 5 mm
QFN 48 pins, 6 mm x 6 mm
KGD (wafer, dice)
System Diagram
Datasheet
CFR0011-120-01
Revision 3.4
1 of 155
09-Nov-2016
© 2014 Dialog Semiconductor
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