Digital Output Ground Voltage (OGND) ........ –0.3V to 1V
Analog Input Voltage (Note 3) .......–0.3V to (V
DD
+ 0.3V)
Digital Input Voltage......................–0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation .............................................1500mW
Operating Temperature Range
LTC2242C-12 ........................................... 0°C to 70°C
LTC2242I-12 ........................................–40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
64 GND
63 V
DD
62 V
DD
61 GND
60 V
CM
59 SENSE
58 MODE
57 LVDS
56 OF
+
/OFA
55 OF
–
/DA11
54 D11
+
/DA10
53 D11
–
/DA9
52 D10
+
/DA8
51 D10
–
/DA7
50 OGND
49 OV
DD
A
IN+
1
A
IN+
2
A
IN–
3
A
IN–
4
REFHA 5
REFHA 6
REFLB 7
REFLB 8
REFHB 9
REFHB 10
REFLA 11
REFLA 12
V
DD
13
V
DD
14
V
DD
15
GND 16
65
48 D9
+
/DA6
47 D9
–
/DA5
46 D8
+
/DA4
45 D8
–
/DA3
44 D7
+
/DA2
43 D7
–
/DA1
42 OV
DD
41 OGND
40 D6
+
/DA0
39 D6
–
/CLKOUTA
38 D5
+
/CLKOUTB
37 D5
–
/OFB
36 CLKOUT
+
/DB11
35 CLKOUT
–
/DB10
34 OV
DD
33 OGND
UP PACKAGE
64-LEAD (9mm
×
9mm) PLASTIC QFN
EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB
T
JMAX
= 150°C,
θ
JA
= 20°C/W
ORDER INFORMATION
LEAD FREE FINISH
LTC2242CUP-12#PBF
LTC2242IUP-12#PBF
LEAD BASED FINISH
LTC2242CUP-12
LTC2242IUP-12
TAPE AND REEL
LTC2242CUP-12#TRPBF
LTC2242IUP-12#TRPBF
TAPE AND REEL
LTC2242CUP-12#TR
LTC2242IUP-12#TR
PART MARKING*
LTC2242UP-12
LTC2242UP-12
PART MARKING*
LTC2242UP-12
LTC2242UP-12
PACKAGE DESCRIPTION
64-Lead (9mm
×
9mm) Plastic QFN
64-Lead (9mm
×
9mm) Plastic QFN
PACKAGE DESCRIPTION
64-Lead (9mm
×
9mm) Plastic QFN
64-Lead (9mm
×
9mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
ENC
+
17
ENC
–
18
SHDN 19
OE
20
DO
–
/DB0 21
DO
+
/DB1 22
D1
–
/DB2 23
D1
+
/DB3 24
OGND 25
OV
DD
26
D2
–
/DB4 27
D2
+
/DB5 28
D3
–
/DB6 29
D3
+
/DB7 30
D4
–
/DB8 31
D4
+
/DB9 32
224212fc
2
LTC2242-12
CONVERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Transition Noise
Internal Reference
External Reference
SENSE = 1V
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
●
●
●
●
●
MIN
12
–2.7
–1
–17
–3.2
TYP
±1
±0.4
±5
±0.7
±10
±60
±45
0.74
MAX
2.7
1
17
3.2
UNITS
Bits
LSB
LSB
mV
%FS
μV/C
ppm/C
ppm/C
LSB
RMS
ANALOG INPUT
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
SYMBOL
V
IN
V
IN, CM
I
IN
I
SENSE
I
MODE
I
LVDS
t
AP
t
JITTER
PARAMETER
Analog Input Range (A
IN+
– A
IN–
)
Analog Input Common Mode (A
IN+
+ A
IN–
)/2
Analog Input Leakage Current
SENSE Input Leakage
MODE Pin Pull-Down Current to GND
LVDS Pin Pull-Down Current to GND
Sample and Hold Acquisition Delay Time
Sample and Hold Acquisition Delay Time Jitter
Full Power Bandwidth
Figure 8 Test Circuit
CONDITIONS
2.375V < V
DD
< 2.625V (Note 7)
Differential Input (Note 7)
0 < A
IN+
, A
IN–
< V
DD
0V < SENSE < 1V
●
●
●
●
MIN
1.2
–1
–1
TYP
±0.5 to ±1
1.25
MAX
1.3
1
1
UNITS
V
V
μA
μA
μA
μA
ns
fs
RMS
MHz
7
7
0.4
95
1200
DYNAMIC ACCURACY
SYMBOL
SNR
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
10MHz Input
70MHz Input
140MHz Input
240MHz Input
l
MIN
63.4
TYP
65.4
65.3
65.3
65.1
78
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBc
224212fc
Signal-to-Noise Ratio (Note 10)
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic
(Note 11)
10MHz Input
70MHz Input
140MHz Input
240MHz Input
l
65
75
74
73
87
Spurious Free Dynamic Range
4th Harmonic or Higher
(Note 11)
10MHz Input
70MHz Input
140MHz Input
240MHz Input
l
73
87
87
87
65.3
S/(N+D)
Signal-to-Noise Plus
Distortion Ratio
(Note 12)
10MHz Input
70MHz Input
140MHz Input
240MHz Input
l
61.8
65.1
64.8
64.5
81
IMD
Intermodulation Distortion
f
IN1
= 135MHz, f
IN2
= 140MHz
3
LTC2242-12
INTERNAL REFERENCE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
2.375V < V
DD
< 2.625V
–1mA < I
OUT
< 1mA
CONDITIONS
I
OUT
= 0
(Note 4)
MIN
1.225
TYP
1.25
±35
3
2
MAX
1.275
UNITS
V
ppm/°C
mV/V
Ω
DIGITAL INPUTS AND DIGITAL OUTPUTS
SYMBOL
V
ID
V
ICM
R
IN
C
IN
V
IH
V
IL
I
IN
C
IN
OV
DD
= 2.5V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
V
OD
V
OS
High Level Output Voltage
Low Level Output Voltage
Differential Output Voltage
Output Common Mode Voltage
I
O
= –500μA
I
O
= 500μA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
OE
= High (Note 7)
V
OUT
= 0V
V
OUT
= 2.5V
I
O
= –10μA
I
O
= –500μA
I
O
= 10μA
I
O
= 500μA
PARAMETER
Differential Input Voltage
Common Mode Input Voltage
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
(Note 7)
V
DD
= 2.5V
V
DD
= 2.5V
V
IN
= 0V to V
DD
(Note 7)
CONDITIONS
(Note 7)
ENCODE INPUTS (ENC
+
, ENC
–
)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
●
TYP
MAX
UNITS
V
0.2
1.2
1.5
1.5
4.8
2
2.0
Internally Set
Externally Set (Note 7)
V
V
kΩ
pF
V
LOGIC INPUTS (OE, SHDN)
●
●
●
1.7
0.7
–10
3
10
V
μA
pF
LOGIC OUTPUTS (CMOS MODE)
3
37
23
2.495
2.45
0.005
0.07
1.75
0.07
●
●
pF
mA
mA
V
V
V
V
V
V
454
1.375
mV
V
LOGIC OUTPUTS (LVDS MODE)
100Ω Differential Load
100Ω Differential Load
247
1.125
350
1.250
224212fc
4
LTC2242-12
POWER REQUIREMENTS
SYMBOL
V
DD
P
SLEEP
P
NAP
OV
DD
I
VDD
I
OVDD
P
DISS
OV
DD
I
VDD
P
DISS
PARAMETER
Analog Supply Voltage
Sleep Mode Power
Nap Mode Power
Output Supply Voltage
Analog Supply Current
Output Supply Current
Power Dissipation
Output Supply Voltage
Analog Supply Current
Power Dissipation
(Note 8)
(Note 7)
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 9)
CONDITIONS
(Note 8)
SHDN = High,
OE
= High, No CLK
SHDN = High,
OE
= Low, No CLK
(Note 8)
●
●
●
●
●
●
●
MIN
2.375
TYP
2.5
1
28
MAX
2.625
UNITS
V
mW
mW
LVDS OUTPUT MODE
2.375
2.5
285
58
858
0.5
2.5
285
740
2.625
320
70
975
2.625
320
V
mA
mA
mW
V
mA
mW
CMOS OUTPUT MODE
TIMING CHARACTERISTICS
SYMBOL
f
S
t
L
t
H
t
AP
t
OE
t
D
t
C
PARAMETER
Sampling Frequency
ENC Low Time (Note 7)
ENC High Time (Note 7)
Sample-and-Hold Aperture Delay
Output Enable Delay
ENC to DATA Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Rise Time
Fall Time
Pipeline Latency
CMOS OUTPUT MODE
t
D
t
C
Pipeline
Latency
ENC to DATA Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Full Rate CMOS
Demuxed Interleaved
Demuxed Simultaneous
The
●
denotes the specifications which apply over the full operating temperature
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