935282471112 datasheet, PDF - EEWORLD Datasheet

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935282471112: DescriptionLVC/LCX/Z SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 4.40 MM, PLASTIC, SOT403-1, MO-153, TSSOP-16; Categorylogic logic; File Size112KB，19 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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935282471112 Overview

LVC/LCX/Z SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 4.40 MM, PLASTIC, SOT403-1, MO-153, TSSOP-16

935282471112 Parametric

Parameter Name	Attribute value
package instruction	TSSOP,
Reach Compliance Code	unknown
Counting direction	RIGHT
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G16
JESD-609 code	e4
length	5 mm
Logic integrated circuit type	SERIAL IN PARALLEL OUT
Number of digits	8
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	18.2 ns
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.2 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE
width	4.4 mm
minfmax	115 MHz

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74LVC595A

8-bit serial-in/serial-out or parallel-out shift register; 3-state

Rev. 01 — 29 May 2007

Product data sheet

1. General description

The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage

The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of

this device in a mixed 3.3 V and 5 V environment.

This device is fully speciﬁed for partial Power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backﬂow current through

the device when it is powered down.

Data is shifted on the positive-going transitions of the SHCP input. The data in the shift

input. If both clocks are connected together, the shift register will always be one clock

pulse ahead of the storage register.

The shift register has a serial input (DS) and a serial output (Q7S) for cascading

purposes. It is also provided with asynchronous reset input MR (active LOW) for all 8 shift

storage register appears at the output whenever the output enable input (OE) is LOW.

2. Features

5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low-power consumption

Direct interface with TTL levels

Balanced propagation delays

All inputs have Schmitt-trigger action

Complies with JEDEC standard JESD8-B/JESD36

ESD protection:

HBM JESD22-A114-D exceeds 2000 V

CDM JESD22-C101-C exceeds 1000 V

Speciﬁed from

−40 °C

to +85

°C

and

−40 °C

to +125

°C.

3. Applications

Serial-to-parallel data conversion

Remote control holding register

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Description	LVC/LCX/Z SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 4.40 MM, PLASTIC, SOT403-1, MO-153, TSSOP-16	LVC/LCX/Z SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16	LVC/LCX/Z SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PQCC16, 2.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT763-1, DHVQFN-16	LVC/LCX/Z SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16	LVC/LCX/Z SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 4.40 MM, PLASTIC, SOT403-1, MO-153, TSSOP-16
package instruction	TSSOP,	SOP,	HVQCCN,	SOP,	TSSOP,
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
Counting direction	RIGHT	RIGHT	RIGHT	RIGHT	RIGHT
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PDSO-G16	R-PDSO-G16	R-PQCC-N16	R-PDSO-G16	R-PDSO-G16
length	5 mm	9.9 mm	3.5 mm	9.9 mm	5 mm
Logic integrated circuit type	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT
Number of digits	8	8	8	8	8
Number of functions	1	1	1	1	1
Number of terminals	16	16	16	16	16
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SOP	HVQCCN	SOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	18.2 ns	18.2 ns	18.2 ns	18.2 ns	18.2 ns
Maximum seat height	1.1 mm	1.75 mm	1 mm	1.75 mm	1.1 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal form	GULL WING	GULL WING	NO LEAD	GULL WING	GULL WING
Terminal pitch	0.65 mm	1.27 mm	0.5 mm	1.27 mm	0.65 mm
Terminal location	DUAL	DUAL	QUAD	DUAL	DUAL
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	4.4 mm	3.9 mm	2.5 mm	3.9 mm	4.4 mm
minfmax	115 MHz	115 MHz	115 MHz	115 MHz	115 MHz
Maker	-	NXP	NXP	NXP	NXP
Base Number Matches	-	1	1	1	1

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