EEWORLDEEWORLDEEWORLD

Part Number

Search

3959803C12461

Description
Board Connector, 36 Contact(s), 3 Row(s), Male, Right Angle, Solder Terminal,
CategoryThe connector    The connector   
File Size178KB,1 Pages
ManufacturerStelvio Kontek SpA
Download Datasheet Parametric View All

3959803C12461 Overview

Board Connector, 36 Contact(s), 3 Row(s), Male, Right Angle, Solder Terminal,

3959803C12461 Parametric

Parameter NameAttribute value
Objectid1100309029
Reach Compliance Codeunknown
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD FLASH
Contact completed and terminatedGOLD FLASH
Contact point genderMALE
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee4
MIL complianceNO
Mixed contactsNO
Installation methodRIGHT ANGLE
Installation typeBOARD
Number of rows loaded3
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typeSOLDER
Total number of contacts36
What basics are needed to learn programming?
Programmers have high salaries and good working environments, and are a profession that many students aspire to, making many non-computer science majors envious. Does that mean non-computer science ma...
xyd小英雄 Programming Basics
I want Vxworks OS source code
This kind of commercial code is rare, and is a treasure for learning. I want to get it. Is there anyone in this field who can provide it? I just want to learn....
yygy Real-time operating system RTOS
How to Eliminate the Output Offset Error of the MSP4301611 Internal 12-bit DAC Module
The manual says that it can be corrected by controlling the DAC12CALON bit, but in actual use, it is found that there is still an offset error, often a negative offset of about 0.01mv. 1. How can I el...
zhangxiajoa Microcontroller MCU
【GD32450I-EVAL】ADC: software trigger + interrupt + single conversion mode
1. ADC performance GD32F450 has 3 ADCs, and the sampling speed of each ADC can reach up to 2.6Mpsp, which is still under the condition of 12-bit maximum precision. If the precision is reduced, it can ...
tinnu GD32 MCU
Development of memory chip packaging technology
Abstract This paper mainly introduces the current status and future development of international memory chip packaging technology....
feifei FPGA/CPLD
Master's thesis<>, how to reflect the algorithm?
My friend, Master's thesis, according to the standards of a master's thesis, how to present the algorithm? Please give some advice....
aofa Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 781  2016  2837  1734  2261  16  41  58  35  46 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号