DSC8103
DSC8123
Programmable Low-Jitter Precision LVDS Oscillator
General Description
The DSC8103 & DSC8123 series of high
performance field-programmable oscillators
utilizes a proven silicon MEMS technology to
provide excellent jitter and stability over a
wide
range
of
supply
voltages
and
temperatures.
Using the TIMEFLASH
programmer, the end user can easily
program the oscillators’ frequency in the field
for immediate testing or use in advance
prototype development or production.
DSC8103 has a standby feature allowing it to
completely power-down when EN pin is
pulled low; whereas for DSC8123, only the
outputs are disabled when EN is low. Both
oscillators are available in industry standard
packages, including the small 3.2x2.5 mm
2
,
and are “drop-in” replacement for standard
6-pin LVDS quartz oscillators.
Features
Low RMS Phase Jitter: <1 ps (typ)
High Stability: ±10, ±25, ±50 ppm
Wide Temperature Range
o
Industrial: -40° to 85° C
o
Ext. commercial: -20° to 70° C
High Supply Noise Rejection: -50 dBc
Short Lead Time: 2 Weeks
Wide Freq. Range: 10 to 460 MHz
Small Industry Standard Footprints
o
2.5x2.0, 3.2x2.5, 5.0x3.2, & 7.0x5.0 mm
Excellent Shock & Vibration Immunity
o
Qualified to MIL-STD-883
High Reliability
o
20x better MTF than quartz oscillators
Low Current Consumption
Supply Range of 2.25 to 3.6 V
Standby & Output Enable Function
Lead Free & RoHS Compliant
LVPECL & HCSL Versions Available
Block Diagram
Applications
Storage Area Networks
o
SATA, SAS, Fibre Channel
Passive Optical Networks
o
EPON, 10G-EPON, GPON, 10G-PON
Ethernet
o
1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video & Surveillance
PCI Express: Gen 1 & Gen 2
DisplayPort
Output Enable Modes
EN Pin
High
NC
Low
DSC8103
Outputs Active
Outputs Active
Standby
DSC8123
Outputs Active
Outputs Active
Outputs Disabled
_____________________________________________________________________________________________________________________________ ________________
DSC8103 | DSC8123
Page 1
MK-Q-B-P-D-030411-03-2
DSC8103
DSC8123
Programmable Low-Jitter Precision LVDS Oscillator
Absolute Maximum Ratings
Item
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
ESD
HBM
MM
CDM
Ordering Code
Condition
Enable Modes
0: Enable/Standby
2: Enable/Disable
Temp Range
E: -20 to 70
I: -40 to 85
L: -40 to 105
M: -55 to 125
Packing
T: Tape & Reel
: Tube
Min
-0.3
-0.3
-
-55
-
-
Max
+4.0
V
DD
+0.3
+150
+150
+260
4000
400
1500
Unit
V
V
°C
°C
°C
V
40sec max.
DSC81
0
3
C I 5
Package
A: 7.0x5.0mm
B: 5.0x3.2mm
C: 3.2x2.5mm
D: 2.5x2.0mm
N: 7.0x5.0mm
(no center pad)
-
125.0000
T
Freq (MHz)
125.0000
Stability
1: ±50ppm
2: ±25ppm
5: ±10ppm
Note: 1000+ years of data retention on internal memory
Specifications
Parameter
Supply Voltage
1
Supply Current
V
DD
I
DD
EN pin low – outputs are disabled
DSC8103
DSC8123
Includes frequency variations due
to initial tolerance, temp. and
power supply voltage
1 year @25°C
T=25°C
0.75xV
DD
-
DSC8103
DSC8123
Pull-up resistor exist
40
29
1.125
350
200
10
48
2.5
200kHz to 20MHz @156.25MHz
100kHz to 20MHz @156.25MHz
12kHz to 20MHz @156.25MHz
0.28
0.4
1.7
460
52
32
1.4
50
Single-Ended
20% to 80%
R
L
=50Ω, C
L
= 2pF
Single Frequency
Differential
Condition
Min.
2.25
Typ.
Max.
3.6
0.095
22
±10
±25
±50
±5
5
-
0.25xV
DD
5
5
20
Unit
V
mA
20
Frequency Stability
Aging
Startup Time
2
Input Logic Levels
Input logic high
Input logic low
Output Disable Time
3
Output Enable Time
Enable Pull-Up Resistor
4
Supply Current
Output offset Voltage
Delta Offset Voltage
Pk to Pk Output Swing
Output Transition time
3
Rise Time
Fall Time
Frequency
Output Duty Cycle
Period Jitter
Integrated Phase Noise
Notes:
1.
2.
3.
4.
Δf
Δf
t
SU
V
IH
V
IL
t
DA
t
EN
ppm
ppm
ms
V
ns
ms
ns
kΩ
mA
V
mV
mV
ps
MHz
%
ps
RMS
ps
RMS
LVDS Outputs
I
DD
V
OS
∆V
OS
Output Enabled, R
L
=50Ω
R=100Ω Differential
V
PP
t
R
t
F
f
0
SYM
J
PER
J
PH
2
Pin 6 V
DD
should be filtered with 0.1uf capacitor.
t
su
is time to 100ppm of output frequency after V
DD
is applied and outputs are enabled.
Output Waveform and Test Circuit figures below define the parameters.
Output is enabled if pad is floated or not connected.
_____________________________________________________________________________________________________________________________ ________________
DSC8103 | DSC8123
Page 2
MK-Q-B-P-D-030411-03-2
DSC8103
DSC8123
Programmable Low-Jitter Precision LVDS Oscillator
Nominal Performance Parameters
(Unless specified otherwise: T=25° C, V
DD
=3.3 V)
0
-10
2.5
50-mV
Phase Jitter (ps RMS)
156MHz-LVDS
2.0
Rejection (dBc)
-20
-30
-40
-50
-60
-70
-80
0.1
1
10
100
100-mV
212MHz-LVDS
320MHz-LVDS
1.5
410MHz-LVDS
1.0
0.5
0.0
1000
10000
0
200
400
600
800
1000
Supply Noise Frequency (kHz)
Low-end of integration BW: x kHz to 20 MHz
Power supply rejection ratio
Phase jitter (integrated phase noise)
Output Waveform
t
R
t
F
Output
Output
80
%
50%
20%
350 mV
830 mv
1/
f
o
t
EN
t
DA
V
IH
Enable
V
IL
Typical Termination Scheme
V
DD
0.1uF
6
2
3
5
4
100
Ω
100
Ω
_____________________________________________________________________________________________________________________________ ________________
DSC8103 | DSC8123
Page 3
MK-Q-B-P-D-030411-03-2
DSC8103
DSC8123
Programmable Low-Jitter Precision LVDS Oscillator
Test Circuit
Solder Reflow Profile
cM
ax
260
°
C
Temperature (°C)
.
20-40
Sec
217
°
C
200
°
C
ax
.
60-150
Sec
150
°
C
3C
/Se
60-180
Sec
cM
Reflow
Pre heat
8 min max
Cool
Time
25
°
C
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp) 3°C/Sec Max.
Preheat Time 150°C to 200°C
60-180 Sec
Time maintained above 217°C
60-150 Sec
255-260°C
Peak Temperature
Time within 5°C of actual Peak
20-40 Sec
6°C/Sec Max.
Ramp-Down Rate
Time 25°C to Peak Temperature
8 min Max.
3C
/
Se
_____________________________________________________________________________________________________________________________ ________________
DSC8103 | DSC8123
Page 4
MK-Q-B-P-D-030411-03-2
S
S
S
6C
6C
6C/
M
cM
cM
ec
a.
a.
a x.
ARM Technology
京公网安备 11010802033920号
EEWORLD
