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SIT3521AI-2C22827L156.250000Y

Description
LVDS Output Clock Oscillator, 156.25MHz Nom, QFN, 10 PIN
CategoryPassive components    oscillator   
File Size1MB,45 Pages
ManufacturerSiTime
Environmental Compliance
Download Datasheet Parametric View All

SIT3521AI-2C22827L156.250000Y Overview

LVDS Output Clock Oscillator, 156.25MHz Nom, QFN, 10 PIN

SIT3521AI-2C22827L156.250000Y Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid145145504104
package instructionLCC10,.12X.2,50/40
Reach Compliance Codeunknown
Other featuresENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT
maximum descent time0.47 ns
Frequency Adjustment - MechanicalNO
frequency stability25%
JESD-609 codee4
Installation featuresSURFACE MOUNT
Number of terminals10
Nominal operating frequency156.25 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
Output load100 OHM, 2 pF
Encapsulate equivalent codeLCC10,.12X.2,50/40
physical size5.0mm x 3.2mm x 0.9mm
longest rise time0.47 ns
Maximum supply voltage3.08 V
Minimum supply voltage2.52 V
Nominal supply voltage2.8 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
SiT3521
1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator
Description
The
SiT3521
is an ultra-low jitter, user programmable
oscillator which offers the system designer great flexibility
and functionality.
The device supports two in-system programming options
after powering up at a default, factory programmed startup
frequency:
Features
Any-frequency mode where the clock output can be
re-programmed to any frequency between 1 MHz and
340 MHz in 1 Hz steps
Digitally controlled oscillator (DCO) mode where the clock
output can be steered or pulled by up to ±3200 ppm with
5 to 94 ppt (parts per trillion) resolution.
The device’s default start-up frequency is specified in the
ordering code. User programming of the device is achieved
via I
2
C or SPI. Up to 16 I
2
C addresses can be specified by
the user either as a factory programmable option or via
hardware pins, enabling the device to share the I
2
C with
other I
2
C devices.
The SiT3521 utilizes SiTime’s unique DualMEMS
®
temperature sensing and TurboCompensation
®
technology
to deliver exceptional dynamic performance:
Programmable frequencies (factory or via I
2
C/SPI)
from 1 MHz to 340 MHz
Digital frequency pulling (DCO) via I
2
C/SPI
Output frequency pulling with perfect pull linearity
13 programmable pull range options to
±3200
ppm
Frequency pull resolution as low as 5 ppt (0.005 ppb)
0.21 ps typical integrated phase jitter (12 kHz to 20 MHz)
Integrated LDO for on-chip power supply noise filtering
0.02 ps/mV PSNR
-40°C to 105°C operating temperature
LVPECL, LVDS, or HCSL outputs
Programmable LVPECL, LVDS Swing
LVDS Common Mode Voltage Control
RoHS and REACH compliant, Pb-free, Halogen-free
and Antimony-free
Applications
Resistant to airflow and thermal shock
Resistant to shock and vibration
Superior power supply noise rejection
Combined with wide frequency range and user
programmability, this device is ideal for telecom, networking
and industrial applications that require a variety of
frequencies and operate in noisy environment.
Ethernet: 1/10/40/100/400 Gbps
G.fast and xDSL
Optical Transport: SONET/SDH, OTN
Clock and data recovery
Processor over-clocking
Low jitter clock generation
Server, storage, datacenter
Test and measurement
Broadcasting
Block Diagram
Package Pinout
(10-Lead QFN, 5.0 x 3.2 mm)
SD
SC
A/
M
LK ISO
10
9
OE / NC
OE / NC
GND
1
8
VDD
OUT-
OUT+
2
7
3
4
5
6
A1 A0
/N /N
C/ C/
M SS
O
SI
Figure 1. SiT3521 Block Diagram
Figure 2. Pin Assignments (Top view)
(Refer to
Table 14
for Pin Descriptions)
Rev 1.01
30 April 2021
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