Z8523316FSC datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > semiconductor> The embedded processor and controller> Z8523316FSC

Z8523316FSC: Description1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80; Categorysemiconductor The embedded processor and controller; File Size643KB，3 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/

Download Datasheet Parametric Compare View All

Z8523316FSC Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	Z8523316FSC	-	-	View	Buy Now

Z8523316FSC Overview

1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80

Z8523316FSC Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	80
Maximum operating temperature	70 Cel
Minimum operating temperature	0.0 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
maximum data transfer rate	20M
External data bus width	16
Number of input and output buses	1
Processing package description	PLASTIC, QFP-80
state	ACTIVE
Craftsmanship	CMOS
packaging shape	RECTANGULAR
Package Size	FLATPACK
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.8000 mm
terminal coating	TIN LEAD
Terminal location	QUAD
Packaging Materials	PLASTIC/EPOXY
Temperature level	COMMERCIAL
Address bus width	16
Maximum FCLK clock frequency	20 MHz
letter of agreement	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP
Data encoding and decoding methods	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Microprocessor type	MULTI PROTOCOL CONTROLLER

Preview

Download Datasheet

View All

ZiLOG’s Family of

Serial Communication Controllers

SCC

8-bit Features include:

• Dual full-duplex channels (Z80230/Z85C30/Z85230)

• Single full-duplex channel (Z85233)

• Ability to accommodate a crystal oscillator, baud

rate generator, and digital phase-locked loop on

each channel

• Processing speeds up to 5Mbps

• Multi-protocol format (async, monosync, bisync,

ZiLOG Sets the standards for SCCs

For over 20 years ZiLOG has set the standard for

Serial Communication Controllers. Based on the

industry acclaimed SCC core, ZiLOG offers a wide

variety of Serial Communication Controllers to meet

your application requirements.

SDLC/HDLC, SDLC/HDLC loop)

• Encodes in the follow modes: NRZI, FM0, FM1

and Manchester

• CRC-16 or CRC-CCITT error detection

• 4-byte Transmit FIFO/8-byte Receive FIFO

(Z80230/Z85230/Z85233)

• 1-byte transmit FIFO/3-byte receive FIFO (Z85C30)

Reduces the need for external logic

ZiLOG SCCs offer low power consumption, higher

performance, and superior noise immunity. The many

on-chip features offered in ZiLOG SCCs help dramatically

to reduce the need for external logic and code develop-

ment found in most of the competition.

16-bit Solutions

The standard and integrated universal serial controllers,

Z16C30 and the Z16C32 offer 16-bit performance, with

processing speeds up to 20 Mbps.

16-bit Features include:

• Single (Z16C32) and dual (Z16C30)

full-duplex channels

• Accommodates two baud rate generators

and one digital phase-locked loop

• Processing speeds up to 10Mbps (Z16C30)

and 20Mbps (Z16C32)

• Multi-protocol format (async, monosync,

slaved monosync, bisync, isochronous,

nine-bit, SDLC/HDLC, SDLC/HDLC loop)

(additional 16-bit features on back)

8-bit Solutions

The standard serial and integrated communications

controller, Z85C30, allows you to easily implement a fully

integrated solution for many networking applications.

The enhanced dual and mono SCCs, the Z80230, Z85230

and the Z85233, include many features that make pro-

gramming easy. These parts also reduce CPU overhead,

allowing the programmer to select packet handling

response and improve cycle access recovery time.

Z8523316FSC Related Products

	Z8523316FSC	Z16C3516VSC	Z8523310FSC	Z8523310VSC	Z8523316VSC	Z85C3008VEC	Z85C3010VEC
Description	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	IC 10MHZ Z8500 CMOS SCC 44-PLCC
Number of terminals	80	80	80	80	44	44	44
Maximum operating temperature	70 Cel	70 Cel	70 Cel	70 Cel	70 °C	100 °C	100 °C
Minimum operating temperature	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	-	-40 °C	-40 °C
External data bus width	16	16	16	16	8	8	8
surface mount	Yes	Yes	Yes	Yes	YES	YES	YES
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	J BEND	J BEND	J BEND
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL
Address bus width	16	16	16	16	-	1	1
letter of agreement	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC
Number of functions	1	1	1	1	-	-	-
Maximum supply/operating voltage	5.5 V	5.5 V	5.5 V	5.5 V	-	-	-
Minimum supply/operating voltage	4.5 V	4.5 V	4.5 V	4.5 V	-	-	-
Rated supply voltage	5 V	5 V	5 V	5 V	-	-	-
maximum data transfer rate	20M	20M	20M	20M	-	-	-
Number of input and output buses	1	1	1	1	-	-	-
Processing package description	PLASTIC, QFP-80	PLASTIC, QFP-80	PLASTIC, QFP-80	PLASTIC, QFP-80	-	-	-
state	ACTIVE	ACTIVE	ACTIVE	ACTIVE	-	-	-
Craftsmanship	CMOS	CMOS	CMOS	CMOS	-	-	-
packaging shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	-	-
Package Size	FLATPACK	FLATPACK	FLATPACK	FLATPACK	-	-	-
Terminal spacing	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	-	-	-
terminal coating	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	-	-	-
Packaging Materials	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	-	-
Maximum FCLK clock frequency	20 MHz	20 MHz	20 MHz	20 MHz	-	-	-
Data encoding and decoding methods	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	-	-	-
Microprocessor type	MULTI PROTOCOL CONTROLLER	MULTI PROTOCOL CONTROLLER	MULTI PROTOCOL CONTROLLER	MULTI PROTOCOL CONTROLLER	-	-	-

Recommended Resources

Insulation resistance meter circuit diagram

One of the high-precision non-contact temperature control circuits

Orchid brand BCD-172, BCD-198 refrigerator circuit

Reverse-biased GaAsP light-emitting diode used as photosensor

Square wave-triangular wave voltage controlled oscillator circuit diagram

What are the foreign documents referenced in the document ?: I'm reading "ZTE Design Specifications and Guidelines - PCB Grounding Design" recently. It's pretty good, but it's a PPT after all, so some parts are not very detailed and in-depth. I want to find som...; 聚众 PCB Design

Can STM32F1 achieve interruption when connected to a 5V rated rotary encoder? [Newbie help]: I'm currently learning about the external interrupts of stm32 and using a rotary encoder as the interrupt source. However, I only have a 5 volt rated rotary encoder and after encoding I found that it ...; LeenO stm32/stm8

There is a problem with the PCB copper layout, please help!: There is no problem with the PCB wiring layout, but when the copper is laid, the GND copper line width is different. Please tell me where the problem is!...; 54545 PCB Design

[Project source code] [Modelsim FAQ] Analysis and Synthesis should be completed: This article and design code were written by FPGA enthusiast Xiao Meige. Without the author's permission, this article is only allowed to be copied and reproduced on online forums, and the original au...; 小梅哥 FPGA/CPLD

【Signal Processing】Design of DSP external bus interface based on FPGA: This article aims at the bus protocol between FPGA and DSP, establishes the interface framework of FPGA and DSP bus communication, designs corresponding timing coordination circuits according to diffe...; hangsky FPGA/CPLD

Guidance system test: [color=rgb(102, 102, 102)][font=Arial, Helvetica, sans-serif][size=14px]The guidance system is the eye of modern weapons, and precision-guided weapons play an increasingly important role in modern war...; trueleven Industrial Control Electronics

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components