Z85C3008VEC datasheet, PDF - EEWORLD Datasheet

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Z85C3008VEC: Description1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80; CategoryThe embedded processor and controller Microcontrollers and processors; File Size643KB，3 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/

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Z85C3008VEC Overview

1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80

Z85C3008VEC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Zilog, Inc.
Parts packaging code	LCC
package instruction	QCCJ, LDCC44,.7SQ
Contacts	44
Reach Compliance Code	unknow
Other features	TWO MODEM CONTROL I/OS USABLE AS GENERAL PURPOSE I/OS; 10 X 19 FRAME STATUS FIFO
Address bus width	1
boundary scan	NO
Bus compatibility	Z80
maximum clock frequency	8 MHz
letter of agreement	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC
Data encoding/decoding methods	NRZ; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.5125 MBps
External data bus width	8
JESD-30 code	S-PQCC-J44
JESD-609 code	e0
length	16.5862 mm
low power mode	NO
Number of DMA channels
Number of I/O lines
Number of serial I/Os	2
Number of terminals	44
On-chip data RAM width
Maximum operating temperature	100 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC44,.7SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	240
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	4.57 mm
Maximum slew rate	12 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	16.5862 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, MULTI PROTOCOL

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ZiLOG’s Family of

Serial Communication Controllers

SCC

8-bit Features include:

• Dual full-duplex channels (Z80230/Z85C30/Z85230)

• Single full-duplex channel (Z85233)

• Ability to accommodate a crystal oscillator, baud

rate generator, and digital phase-locked loop on

each channel

• Processing speeds up to 5Mbps

• Multi-protocol format (async, monosync, bisync,

ZiLOG Sets the standards for SCCs

For over 20 years ZiLOG has set the standard for

Serial Communication Controllers. Based on the

industry acclaimed SCC core, ZiLOG offers a wide

variety of Serial Communication Controllers to meet

your application requirements.

SDLC/HDLC, SDLC/HDLC loop)

• Encodes in the follow modes: NRZI, FM0, FM1

and Manchester

• CRC-16 or CRC-CCITT error detection

• 4-byte Transmit FIFO/8-byte Receive FIFO

(Z80230/Z85230/Z85233)

• 1-byte transmit FIFO/3-byte receive FIFO (Z85C30)

Reduces the need for external logic

ZiLOG SCCs offer low power consumption, higher

performance, and superior noise immunity. The many

on-chip features offered in ZiLOG SCCs help dramatically

to reduce the need for external logic and code develop-

ment found in most of the competition.

16-bit Solutions

The standard and integrated universal serial controllers,

Z16C30 and the Z16C32 offer 16-bit performance, with

processing speeds up to 20 Mbps.

16-bit Features include:

• Single (Z16C32) and dual (Z16C30)

full-duplex channels

• Accommodates two baud rate generators

and one digital phase-locked loop

• Processing speeds up to 10Mbps (Z16C30)

and 20Mbps (Z16C32)

• Multi-protocol format (async, monosync,

slaved monosync, bisync, isochronous,

nine-bit, SDLC/HDLC, SDLC/HDLC loop)

(additional 16-bit features on back)

8-bit Solutions

The standard serial and integrated communications

controller, Z85C30, allows you to easily implement a fully

integrated solution for many networking applications.

The enhanced dual and mono SCCs, the Z80230, Z85230

and the Z85233, include many features that make pro-

gramming easy. These parts also reduce CPU overhead,

allowing the programmer to select packet handling

response and improve cycle access recovery time.

Z85C3008VEC Related Products

	Z85C3008VEC	Z16C3516VSC	Z8523310FSC	Z8523310VSC	Z8523316FSC	Z8523316VSC	Z85C3010VEC
Description	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	1 CHANNEL(S), 20M bps, MULTI PROTOCOL CONTROLLER, PQFP80	IC 10MHZ Z8500 CMOS SCC 44-PLCC
Address bus width	1	16	16	16	16	-	1
letter of agreement	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC; EXT SYNC; BISYNC TRANSPARENT; NBIP	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC
External data bus width	8	16	16	16	16	8	8
Number of terminals	44	80	80	80	80	44	44
Maximum operating temperature	100 °C	70 Cel	70 Cel	70 Cel	70 Cel	70 °C	100 °C
Minimum operating temperature	-40 °C	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	-	-40 °C
surface mount	YES	Yes	Yes	Yes	Yes	YES	YES
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL
Terminal form	J BEND	GULL WING	GULL WING	GULL WING	GULL WING	J BEND	J BEND
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Number of functions	-	1	1	1	1	-	-
Maximum supply/operating voltage	-	5.5 V	5.5 V	5.5 V	5.5 V	-	-
Minimum supply/operating voltage	-	4.5 V	4.5 V	4.5 V	4.5 V	-	-
Rated supply voltage	-	5 V	5 V	5 V	5 V	-	-
maximum data transfer rate	-	20M	20M	20M	20M	-	-
Number of input and output buses	-	1	1	1	1	-	-
Processing package description	-	PLASTIC, QFP-80	PLASTIC, QFP-80	PLASTIC, QFP-80	PLASTIC, QFP-80	-	-
state	-	ACTIVE	ACTIVE	ACTIVE	ACTIVE	-	-
Craftsmanship	-	CMOS	CMOS	CMOS	CMOS	-	-
packaging shape	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	-
Package Size	-	FLATPACK	FLATPACK	FLATPACK	FLATPACK	-	-
Terminal spacing	-	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	-	-
terminal coating	-	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	-	-
Packaging Materials	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	-
Maximum FCLK clock frequency	-	20 MHz	20 MHz	20 MHz	20 MHz	-	-
Data encoding and decoding methods	-	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZB; NRZI-MARK; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	-	-
Microprocessor type	-	MULTI PROTOCOL CONTROLLER	MULTI PROTOCOL CONTROLLER	MULTI PROTOCOL CONTROLLER	MULTI PROTOCOL CONTROLLER	-	-

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