MN101E31 datasheet, PDF - EEWORLD Datasheet

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MN101E31: Description8-bit Single-chip Microcontroller; File Size470KB，10 Pages; ManufacturerPanasonic; Websitehttp://www.panasonic.co.jp/semicon/e-index.html

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MN101E31 Overview

8-bit Single-chip Microcontroller

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MN101E31 Series

8-bit Single-chip Microcontroller



Overview

The MN101E series of 8-bit single-chip microcomputers (the memory expansion version of MN101C series) incorporate

multiple types of peripheral functions. This chip series is well suited for camera, VCR, MD, TV, CD, LD, printer, telephone,

home automation, pager, air conditioner, PPC, fax machine, music instrument and other applications.

This LSI brings to embedded microcomputer applications ﬂexible, optimized hardware conﬁgurations and a simple efﬁcient

instruction set. The MN101E31 series have an internal 128 KB/64 KB (maximum) of ROM and 6 KB/4 KB(maximum) of

RAM. Peripheral functions include 6 external interrupts, 23 internal interrupts including NMI, 9 timer counters, 5 sets of serial

interfaces, A/D converter, LCD driver, watchdog timer, 1 set of automatic data transfer, synchronous output function and buzzer

output. The conﬁguration of this microcomputer is well suited for application as a system controller in camera, timer selector for

VCR, CD player, or minicomponent.

With three oscillation system (high frequency : max. 10 MHz / low frequency : 32.768 kHz and PLL : frequency multiplier

of high frequency) contained on the chip, the system clock can be switched to high frequency input (high speed mode), PLL

input (PLL mode), or to low frequency input (low speed mode).

The system clock is generated by dividing the oscillation clock. The best operation clock for the system can be selected by

switching its frequency by software. High speed mode has the normal mode which is based on 2-cycle clock (fpll/2) and the

double speed mode which is based on the not-devided clock with fpll.

A machine cycle (min. instructions execution) in the normal mode is 200 ns when fosc is 10 MHz (at the time that PLL is

not used). A machine cycle in the double speed mode is 100 ns when fosc is 10 MHz. A machine cycle in the PLL mode is 50 ns

(maximum).The package is 80-pin, LQFP.



Product Summary

This manual describes the following models of the MN101E31 series. These products have identical functions. Please note that mainly

dealed here is MN101E31G.

Model

MN101E31G

MN101E31D

MN101E31A

MN101EF31G

MN101EF31D

ROM Size

128 KB

64 KB

32 KB

128 KB + 4 KB

64 KB + 8 KB

RAM Size

6 KB

4 KB

2 KB

6 KB

4 KB

Flash EEPROM version

Mask ROM version

LQFP080-P-1414A

Classiﬁcation

Package

Publication date: February 2012

Ver. HEM

MN101E31 Related Products

	MN101E31	MN101E31A	MN101E31D	MN101EF31D
Description	8-bit Single-chip Microcontroller	8-bit Single-chip Microcontroller	8-bit Single-chip Microcontroller	8-bit Single-chip Microcontroller

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