DATASHEET
ISL6161
Dual Power Distribution Controller
The
ISL6161
is a hot swap dual supply power distribution
controller that can be used in PCI Express (PCIe) applications.
Two external N-channel MOSFETs are driven to distribute and
control power while providing load fault isolation. At turn-on,
the gate of each external N-channel MOSFET is charged with a
10µA current source. Capacitors on each gate create a
programmable ramp (soft turn-on) to control in-rush currents,
as
Figure 1
shows. A built-in charge pump supplies the gate
drive for the 12V supply N-channel MOSFET switch.
Two external current sense resistors and FETs provide
overcurrent (OC) protection. When the current through either
resistor exceeds the user programmed value, the controller
enters Current Regulation mode. The timeout capacitor, C
TIM
,
starts charging as the controller enters the timeout period.
When C
TIM
charges to a 2V threshold, both N-Channel
MOSFETs are latched off. In the event of a hard and fast fault
of at least three times the programmed current limit level, the
N-channel MOSFET gates are pulled low immediately before
entering the timeout period. The controller is reset by a rising
edge on the ENABLE pin.
The ISL6161 constantly monitors both output voltages and
reports either one being low on the PGOOD output as a low.
The 12V PGOOD Voltage Threshold (Vth) is ~10.8V and the
3.3V Vth is ~2.85V nominally.
FN9104
Rev.7.00
Aug 16, 2018
Features
• Hot swap dual power distribution and control for +12V and
+3.3V rails
• Provides fault isolation
• Programmable current regulation level
• Programmable timeout
• Charge pump allows the use of N-channel MOSFETs
• Power-good and OC latch indicators
• Adjustable turn-on ramp
• Protection during turn-on
• Two levels of current limit detection provide fast response to
varying fault conditions
• 1µs response time to dead short
• 3µs response time to 200% current overshoot
• Pb-free available (RoHS compliant)
Applications
• PCIe applications
• Power distribution and control
• Hot plug and hot swap components
Related Literature
For a full list of related documents, visit our website
•
ISL6161
product information page
C
PUMP
R
SENSE
R
LOAD
ISL6161
12VS 12VISEN
R
ILIM
12VG
V
DD
ENABLE
INPUT
3.3V
C
GATE
R
ILIM
12V
OPTIONAL
V
DD
R
FILTER
C
FILTER
C
GATE
GND
C
TIM
3.3V
C
PUMP
ENABLE C
TIM
PGOOD
3VG
3VS
3ISEN
R
SENSE
R
LOAD
FIGURE 1. TYPICAL APPLICATION DIAGRAM
FN9104 Rev.7.00
Aug 16, 2018
Page 1 of 14
FN9104 Rev.7.00
Aug 16, 2018
Page 2 of 14
ISL6161
12VIN
R
SENSE
TO LOAD
12VS
OC
CLIM
+
-
R
100µA
2R
12V
12ISEN
12VG
10µA
18V
C
GATE
OPTIONAL
V
DD
R
FILTER
C
FILTER
NC
RISING
EDGE
RESET
V
DD
FALLING
EDGE
DELAY
ENABLE
-
+
3X
18V
POR
R
ILIM
R
ILIM
GND
R QN
R
Q
S
ENABLE
QPUMP
12V
10A
TO V
DD
C
PUMP
C
PUMP
ENABLE
12V
C
GATE
100µA
ENABLE
FALLING
EDGE
DELAY
3X
+
-
CLIM
-
+
OC
12V
C
TIM
+
-
2R
2V
C
TIM
+
-
PGOOD
OC
LATCH
10µA
3VG
R
PGOOD
3ISEN
OPTIONAL
3VS
ISL6161
R
SENSE
3.3VIN
TO LOAD
FIGURE 2. SIMPLIFIED SCHEMATIC (for 14 LD SOIC)
ISL6161
Ordering Information
PART NUMBER
(Notes
2, 3)
ISL6161IVZA-T
ISL6161CBZA
ISL6161CBZA-T
PART
MARKING
6161IVZ
6161CBZ
6161CBZ
TEMP. RANGE
(°C)
-40 to +85
0 to +70
0 to +70
TAPE AND REEL
(Units) (Note
1)
2.5k
-
2.5k
PACKAGE
(RoHS Compliant)
16 Ld TSSOP
14 Ld SOIC
14 Ld SOIC
PKG. DWG. #
M16.173
M14.15
M14.15
NOTE:
1. Refer to
TB347
for details about reel specifications.
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see the
ISL6161
product information. For more information about MSL, refer to
TB363.
Pin Configurations
14 LD SOIC
TOP VIEW
16 LD TSSOP
TOP VIEW
12VS
12VG
V
DD
NC
ENABLE
3VG
3VS
1
2
3
4
5
6
7
14 12VISEN
13 R
ILIM
12 GND
11 C
PUMP
10 C
TIM
9
8
PGOOD
3VISEN
12VS
12VG
NC
V
DD
ENABLE
NC
3VG
3VS
1
2
3
4
5
6
7
8
16 12VISEN
15 R
ILIM
14 NC
13 GND
12 C
PUMP
11 C
TIM
10 PGOOD
9
3VISEN
FN9104 Rev.7.00
Aug 16, 2018
Page 3 of 14
ISL6161
Pin Descriptions
PIN #
SOIC
1
2
PIN #
TSSOP
1
2
SYMBOL
12VS
12VG
FUNCTION
12V Source
12V Gate
DESCRIPTION
Connect to the associated external N-channel MOSFET switch source to sense output voltage.
Connect to the associated N-channel MOSFET switch gate. A capacitor from this node to ground
sets the turn-on ramp. At turn-on, this capacitor will be charged to ~17.4V by a 10µA current
source.
Connect to the 12V supply. This can be connected directly to the +12V rail supplying the load
voltage or to a dedicated V
DD
+12V supply. If connecting to the +12V rail supplying the load
voltage, pay special attention to V
DD
decoupling to prevent sagging as heavy loads are switched
on.
Not connected.
Turns on and resets the chip. Both outputs turn on when this pin is driven low. After a current limit
timeout, the chip is reset by the rising edge of a reset signal applied to the ENABLE pin. This input
has 100µA pull-up capability, which is compatible with 3V and 5V open drain and standard logic.
Connect to the gate of the external 3V N-channel MOSFET. A capacitor from this node to ground
sets the turn-on ramp. At turn-on, this capacitor will be charged to ~11.9V by a 10µA current
source.
Connect to the source side of 3V external N-channel MOSFET switch to sense output voltage.
Connect to the load side of the 3V sense resistor to measure the voltage drop across this resistor
between the 3VS and 3VISEN pins.
Indicates that all output voltages are within specification. PGOOD is driven by an open drain
N-Channel MOSFET. It is pulled low when any output is not within specification.
3
4
V
DD
Chip Supply
4
5
3,6,14
5
NC
ENABLE
Not Connected
Enable/Reset
6
7
3VG
3V Gate
7
8
9
10
8
9
10
11
3VS
3VISEN
PGOOD
C
TIM
3V Source
3V Current Sense
Power-Good
Indicator
Current Limit Timing Connect a capacitor from this pin to ground. This capacitor controls the time between the onset
Capacitor
of current limit and chip shutdown (current limit timeout). The duration of current limit timeout
(in seconds) = 200kΩ x C
TIM
(Farads).
Charge Pump
Capacitor
Chip Ground
Current Limit Set
Resistor
Connect a 0.1µF capacitor between this pin and V
DD
(Pin 3). Provides charge storage for the
12VG drive.
Chip ground.
A resistor connected between this pin and ground determines the current level at which current
limit is activated. This current is determined by the ratio of the R
ILIM
resistor to the sense resistor
(R
SENSE
). The current at current limit onset is equal to 10µA x (R
ILIM
/R
SENSE
). The ISL6161 can
accommodate either a 10kΩ resistor (OC Vth = 100mV) or a 4.99kΩresistor for a lower trip
(OC Vth = 53mV). See
Table 2 on page 7
for more details.
Connect to the load side of the sense resistor to measure the voltage drop across this resistor.
11
12
13
12
13
15
C
PUMP
GND
R
ILIM
14
16
12VISEN
12V Current Sense
FN9104 Rev.7.00
Aug 16, 2018
Page 4 of 14
ISL6161
Absolute Maximum Ratings
T
A
= 25°C
Thermal Information
Thermal Resistance (Typical,
Note 4)
JA
(°C/W)
14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
67
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
94
Maximum Junction Temperature (Plastic Package) . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . Refer to
TB493
V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +16V
12VG, C
PUMP
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 21V
12VISEN, 12VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5V to V
DD
+ 0.3V
3VISEN, 3VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5V to 7.5V
PGOOD, R
ILIM
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7.5V
ENABLE, C
TIM
, 3VG. . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
DD
+ 0.3V
ESD Classification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV (Class 2)
Operating Conditions
V
DD
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . +10.5V to +13.2V
Temperature Range (T
A
)
ISL6161IVZA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
ISL6161CBZA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured with the component mounted on a high-effective thermal conductivity test board in free air. Refer to
TB379
for details.
5. All voltages are relative to GND, unless otherwise specified.
V
DD
= 12V, C
VG
= 0.01µF, C
TIM
= 0.1µF, R
SENSE
= 0.1Ω, C
BULK
= 220µF, ESR = 0.5W, T
A
= T
J
= -40°C to +85°C,
unless otherwise specified. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits
established by characterization and are not production tested.
PARAMETER
12V CONTROL
Current Limit Threshold Voltage
(Voltage Across Sense Resistor)
3x Current Limit Threshold Voltage
(Voltage Across Sense Resistor)
±20% Current Limit Response Time
(Current within 20% of Regulated Value)
±10% Current Limit Response Time
(Current within 10% of Regulated Value)
±1% Current Limit Response Time
(Current within 1% of Regulated Value)
Response Time to Dead Short
Gate Turn-On Time
Gate Turn-On Current
3x Gate Discharge Current
12V Undervoltage Threshold
Charge Pumped 12VG Voltage
3.3V CONTROL
Current Limit Threshold Voltage
(Voltage Across Sense Resistor)
3x Current Limit Threshold Voltage
(Voltage Across Sense Resistor)
±20% Current Limit Response Time
(Current within 20% of Regulated Value)
±10% Current Limit Response Time
(Current within 10% of Regulated Value)
V
IL3V
R
ILIM
= 10kΩ
R
ILIM
= 5kΩ
3 x V
IL3V
R
ILIM
= 10kΩ
R
ILIM
= 5kΩ
200% Current Overload, R
ILIM
= 10kΩ,
R
SHORT
= 2.5Ω
200% Current Overload, R
ILIM
= 10kΩ,
R
SHORT
= 2.5Ω
92
47
250
100
-
-
100
53
300
155
2
4
108
59
350
210
-
-
mV
mV
mV
mV
µs
µs
V
IL12V
R
ILIM
= 10kΩ
R
ILIM
= 5kΩ
3 x V
IL12V
R
ILIM
= 10kΩ
R
ILIM
= 5kΩ
20%iLrt
10%iLrt
1%iLrt
RT
SHORT
t
ON12V
I
ON12V
3XdisI
12V
VUV
V12VG
C
PUMP
= 0.1µF
200% Current Overload, R
ILIM
= 10kΩ,
R
SHORT
= 6.0Ω
200% Current Overload, R
ILIM
= 10kΩ,
R
SHORT
= 6.0Ω
200% Current Overload, R
ILIM
= 10kΩ,
R
SHORT
= 6.0Ω
C
12VG
= 0.01µF
C
12VG
= 0.01µF
C
12VG
= 0.01µF
12VG = 18V
92
47
250
100
-
-
-
-
-
8
-
10.5
16.8
100
53
300
165
2
4
10
500
12
10
0.75
10.8
17.3
108
59
350
210
-
-
-
-
-
12
-
11.0
17.9
mV
mV
mV
mV
µs
µs
µs
ns
ms
µA
A
V
V
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Electrical Specifications
FN9104 Rev.7.00
Aug 16, 2018
Page 5 of 14
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