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K4J55323QF-GC

Description
256Mbit GDDR3 SDRAM
File Size1MB,49 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
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K4J55323QF-GC Overview

256Mbit GDDR3 SDRAM

K4J55323QF-GC
256M GDDR3 SDRAM
256Mbit GDDR3 SDRAM
Revision 1.8
April 2005
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure could result in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
Samsung Electronics reserves the right to change products or specification without notice.
- 1 -
Rev 1.8 (Apr. 2005)

K4J55323QF-GC Related Products

K4J55323QF-GC K4J55323QF-GC14 K4J55323QF-GC15 K4J55323QF-GC16 K4J55323QF-GC20
Description 256Mbit GDDR3 SDRAM 256Mbit GDDR3 SDRAM 256Mbit GDDR3 SDRAM 256Mbit GDDR3 SDRAM 256Mbit GDDR3 SDRAM
Is it Rohs certified? - incompatible incompatible incompatible incompatible
package instruction - FBGA, BGA144,12X12,32 FBGA, BGA144,12X12,32 FBGA, BGA144,12X12,32 FBGA, BGA144,12X12,32
Reach Compliance Code - unknow unknow unknow unknow
Maximum access time - 0.26 ns 0.26 ns 0.29 ns 0.35 ns
Maximum clock frequency (fCLK) - 700 MHz 667 MHz 600 MHz 500 MHz
I/O type - COMMON COMMON COMMON COMMON
interleaved burst length - 4 4 4 4
JESD-30 code - S-PBGA-B144 S-PBGA-B144 S-PBGA-B144 S-PBGA-B144
JESD-609 code - e0 - e0 e0
memory density - 268435456 bi 268435456 bi 268435456 bi 268435456 bi
Memory IC Type - DDR DRAM DDR DRAM DDR DRAM DDR DRAM
memory width - 32 32 32 32
Number of terminals - 144 144 144 144
word count - 8388608 words 8388608 words 8388608 words 8388608 words
character code - 8000000 8000000 8000000 8000000
Maximum operating temperature - 85 °C 85 °C 85 °C 85 °C
organize - 8MX32 8MX32 8MX32 8MX32
Output characteristics - 3-STATE 3-STATE 3-STATE 3-STATE
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - FBGA FBGA FBGA FBGA
Encapsulate equivalent code - BGA144,12X12,32 BGA144,12X12,32 BGA144,12X12,32 BGA144,12X12,32
Package shape - SQUARE SQUARE SQUARE SQUARE
Package form - GRID ARRAY, FINE PITCH GRID ARRAY, FINE PITCH GRID ARRAY, FINE PITCH GRID ARRAY, FINE PITCH
power supply - 2 V 2 V 2 V 2 V
Certification status - Not Qualified Not Qualified Not Qualified Not Qualified
refresh cycle - 4096 4096 4096 4096
Continuous burst length - 4 4 4 4
Maximum standby current - 0.14 A 0.14 A 0.135 A 0.13 A
Maximum slew rate - 1.06 mA 1.055 mA 0.97 mA 0.95 mA
Nominal supply voltage (Vsup) - 2 V 2 V 2 V 2 V
surface mount - YES YES YES YES
technology - CMOS CMOS CMOS CMOS
Temperature level - OTHER OTHER OTHER OTHER
Terminal surface - Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form - BALL BALL BALL BALL
Terminal pitch - 0.8 mm 0.8 mm 0.8 mm 0.8 mm
Terminal location - BOTTOM BOTTOM BOTTOM BOTTOM
Base Number Matches - 1 1 1 1
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