IRS2302S
HALF-BRIDGE DRIVER
Features
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage – dV/dt
immune
Gate drive supply range from 5V to 20V
Undervoltage lockout for both channels
3.3V, 5V and 15V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
High side output in phase with input
Internal 450ns dead-time
Lower di/dt gate driver for better noise immunity
Shut down input turns off both channels
Leadfree, RoHS compliant
Product Summary
V
OFFSET
V
OUT
I
o+
& I
o-
(typical)
t
ON
& t
OFF
(typical)
Delay Matching
600V Max
5V – 20V
200mA / 350mA
650ns / 200ns
50ns
Typical Applications
Appliance motor drives
Servo drives
Micro inverter drives
General purpose three phase inverters
Package Options
8-Lead SOIC
IRS2302S
Ordering Information
Base Part Number
Package Type
Standard Pack
Form
Tube/Bulk
Tape and Reel
Quantity
95
2500
Complete Part Number
IRS2302SPBF
IRS2302STRPBF
IRS2302S
SOIC8N
1
www.irf.com
© 2013 International Rectifier
February 13, 2013
IRS2302S
Typical Connection Diagram
(Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only.
Please refer to our Application Notes and Design Tips for proper circuit board layout.
2
www.irf.com
© 2013 International Rectifier
February 13, 2013
IRS2302S
Table of Contents
Ordering Information
Typical Connection Diagram
Description
Absolute Maximum Ratings
Recommended Operating Conditions
Static Electrical Characteristics
Dynamic Electrical Characteristics
Functional Block Diagram
Input/output Timing Diagram
Lead Definitions
Lead Assignments
Application Information and Additional Details
Package Details
Tape and Reel Details
Part Marking Information
Qualification Information
Page
1
2
4
5
5
6
7
8
9
10
10
11
13
14
15
16
3
www.irf.com
© 2013 International Rectifier
February 13, 2013
IRS2302S
Description
The IRS2302S is a high voltage, high speed power MOSFET and IGBT driver with independent high- and low-side
referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic
construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output
drivers feature a high pulse current buffer stage. The floating channel can be used to drive an N-channel power
MOSFET or IGBT in the high-side configuration which operates up to 600V.
4
www.irf.com
© 2013 International Rectifier
February 13, 2013
IRS2302S
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dV
S
/dt
P
D
Rth
JA
T
J
T
S
T
L
Definition
High-side floating absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage (IN & SD)
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ 25°C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
COM -0.3
—
—
—
—
-50
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
50
0.625
200
150
150
300
°C
V/ns
W
°C/W
V
Units
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within
the recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential
.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
†:
Definition
High-side floating supply absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage (IN & SD)
Ambient temperature
Min.
V
S
+ 5
†1
V
S
5
0
COM
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
V
CC
125
°C
V
Units
Logic operational for V
S
of -5 V to +600 V. Logic state held for V
S
of -5 V to – V
BS.
(Please refer to the Design Tip DT97 -3 for more details).
5
www.irf.com
© 2013 International Rectifier
February 13, 2013