74AUP1G175GM,132 datasheet, PDF

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74AUP1G175GM,132: Descriptionflip flops flip flop D-type pos-edge 1-elem 6pin; Categorylogic logic; File Size218KB，23 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74AUP1G175GM,132 Overview

flip flops flip flop D-type pos-edge 1-elem 6pin

74AUP1G175GM,132 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconduc
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SON
package instruction	1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6
Contacts	6
Manufacturer packaging code	SOT886
Reach Compliance Code	compli
series	AUP/ULP/V
JESD-30 code	R-PDSO-N6
JESD-609 code	e3
length	1.45 mm
Load capacitance (CL)	30 pF
Logic integrated circuit type	D FLIP-FLOP
Maximum Frequency@Nom-Su	70000000 Hz
MaximumI(ol)	0.0017 A
Humidity sensitivity level	1
Number of digits	1
Number of functions	1
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Encapsulate equivalent code	SOLCC6,.04,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	1.2/3.3 V
Prop。Delay @ Nom-Su	21 ns
propagation delay (tpd)	21 ns
Certification status	Not Qualified
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
Trigger type	POSITIVE EDGE
width	1 mm
minfmax	410 MHz

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74AUP1G175

Low-power D-type flip-flop with reset; positive-edge trigger

Rev. 5 — 3 July 2012

Product data sheet

1. General description

The 74AUP1G175 provides a low-power, low-voltage positive-edge triggered D-type

flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q

output. The master reset (MR) is an asynchronous active LOW input and operates

independently of the clock input. Information on the data input is transferred to the

Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable

one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall

times across the entire V

range from 0.8 V to 3.6 V. This device ensures a very low

static and dynamic power consumption across the entire V

range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

2. Features and benefits



Wide supply voltage range from 0.8 V to 3.6 V



High noise immunity



Complies with JEDEC standards:



JESD8-12 (0.8 V to 1.3 V)



JESD8-11 (0.9 V to 1.65 V)



JESD8-7 (1.2 V to 1.95 V)



JESD8-5 (1.8 V to 2.7 V)



JESD8-B (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F Class 3A exceeds 5000 V



MM JESD22-A115-A exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Low static power consumption; I

= 0.9

A

(maximum)



Latch-up performance exceeds 100 mA per JESD 78 Class II



Inputs accept voltages up to 3.6 V



Low noise overshoot and undershoot < 10 % of V



OFF

circuitry provides partial Power-down mode operation



Multiple package options



Specified from

40 C

to +85

C

and

40 C

to +125

C

74AUP1G175GM,132 Related Products

	74AUP1G175GM,132	74AUP1G175GW,125	74AUP1G175GN,132	74AUP1G175GS,132	74AUP1G175GF,132	74AUP1G175GM,115
Description	flip flops flip flop D-type pos-edge 1-elem 6pin	flip flops 1.8V single schmitt	flip flops 3.6V 12ns xson6	flip flops 3.6V 12ns xson6	flip flops flip flop D-type pos-edge 1-elem 6pin	flip flops 1.8V single schmitt
Brand Name	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to
package instruction	1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6	SOT-363, SC-88, 6 PIN	0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6	1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6	1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6	1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6
Manufacturer packaging code	SOT886	SOT363	SOT1115	SOT1202	SOT891	SOT886
Reach Compliance Code	compli	compli	compli	compli	compli	compli
Parts packaging code	SON	TSSOP	SON	-	SON	SON
Contacts	6	6	6	-	6	6
series	AUP/ULP/V	AUP/ULP/V	-	-	AUP/ULP/V	AUP/ULP/V
JESD-30 code	R-PDSO-N6	R-PDSO-G6	-	-	R-PDSO-N6	R-PDSO-N6
JESD-609 code	e3	e3	-	-	e3	e3
length	1.45 mm	2 mm	-	-	1 mm	1.45 mm
Load capacitance (CL)	30 pF	30 pF	-	-	30 pF	30 pF
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP	-	-	D FLIP-FLOP	D FLIP-FLOP
Maximum Frequency@Nom-Su	70000000 Hz	70000000 Hz	-	-	70000000 Hz	70000000 Hz
MaximumI(ol)	0.0017 A	0.0017 A	-	-	0.0017 A	0.0017 A
Humidity sensitivity level	1	1	-	-	1	1
Number of digits	1	1	-	-	1	1
Number of functions	1	1	-	-	1	1
Number of terminals	6	6	-	-	6	6
Maximum operating temperature	125 °C	125 °C	-	-	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-	-	-40 °C	-40 °C
Output polarity	TRUE	TRUE	-	-	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VSON	TSSOP	-	-	VSON	VSON
Encapsulate equivalent code	SOLCC6,.04,20	TSSOP6,.08	-	-	SOLCC6,.04,14	SOLCC6,.04,20
Package shape	RECTANGULAR	RECTANGULAR	-	-	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	-	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE
method of packing	TAPE AND REEL	TAPE AND REEL	-	-	TAPE AND REEL	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260	260	-	-	260	260
power supply	1.2/3.3 V	1.2/3.3 V	-	-	1.2/3.3 V	1.2/3.3 V
Prop。Delay @ Nom-Su	21 ns	21 ns	-	-	21 ns	21 ns
propagation delay (tpd)	21 ns	21 ns	-	-	21 ns	21 ns
Certification status	Not Qualified	Not Qualified	-	-	Not Qualified	Not Qualified
Maximum seat height	0.5 mm	1.1 mm	-	-	0.5 mm	0.5 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	-	-	3.6 V	3.6 V
Minimum supply voltage (Vsup)	0.8 V	0.8 V	-	-	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.2 V	1.2 V	-	-	1.2 V	1.2 V
surface mount	YES	YES	-	-	YES	YES
technology	CMOS	CMOS	-	-	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	-	-	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Tin (Sn)	Tin (Sn)	-	-	Tin (Sn)	Tin (Sn)
Terminal form	NO LEAD	GULL WING	-	-	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.65 mm	-	-	0.35 mm	0.5 mm
Terminal location	DUAL	DUAL	-	-	DUAL	DUAL
Maximum time at peak reflow temperature	40	40	-	-	40	40
Trigger type	POSITIVE EDGE	POSITIVE EDGE	-	-	POSITIVE EDGE	POSITIVE EDGE
width	1 mm	1.25 mm	-	-	1 mm	1 mm
minfmax	410 MHz	410 MHz	-	-	410 MHz	410 MHz
Base Number Matches	-	1	1	1	1	1

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