74HC4094PW,112 datasheet, PDF - EEWORLD Datasheet

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74HC4094PW,112: Descriptioncounter shift registers 8-stage shift and; Categorylogic logic; File Size202KB，23 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74HC4094PW,112 Overview

counter shift registers 8-stage shift and

74HC4094PW,112 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconduc
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP16,.25
Contacts	16
Manufacturer packaging code	SOT403-1
Reach Compliance Code	compli
Other features	UNLATCHED SERIAL SHIFT RIGHT OUTPUT; PARALLEL OUTPUT IS LATCHED
Counting direction	RIGHT
series	HC/UH
JESD-30 code	R-PDSO-G16
JESD-609 code	e4
length	5 mm
Logic integrated circuit type	SERIAL IN PARALLEL OUT
Maximum Frequency@Nom-Su	24000000 Hz
Humidity sensitivity level	1
Number of digits	8
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	2/6 V
propagation delay (tpd)	295 ns
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
Trigger type	POSITIVE EDGE
width	4.4 mm
minfmax	24 MHz
Base Number Matches	1

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74HC4094; 74HCT4094

8-stage shift-and-store bus register

Rev. 6 — 31 December 2012

Product data sheet

1. General description

The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a

storage register and 3-state outputs. Both the shift and storage register have separate

clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to

enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is

available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when

clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW

transition of the CP input to allow cascading when clock edges are slow. The data in the

shift register is transferred to the storage register when the STR input is HIGH. Data in the

storage register appears at the outputs whenever the output enable input (OE) is HIGH. A

LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the

OE input does not affect the state of the registers. Inputs include clamp diodes. This

enables the use of current limiting resistors to interface inputs to voltages in excess of

2. Features and benefits



Complies with JEDEC standard JESD7A



Input levels:



For 74HC4094: CMOS level



For 74HCT4094: TTL level



Low-power dissipation



ESD protection:



HBM JESD22-A114F exceeds 2 000 V



MM JESD22-A115-A exceeds 200 V



Specified from

40 C

to +85

C

and from

40 C

to +125

C

3. Applications



Serial-to-parallel data conversion



Remote control holding register

74HC4094PW,112 Related Products

	74HC4094PW,112	74HC4094DB,112	74HCT4094DB,112	74HC4094D,652	74HC4094DB,118	74HC4094PW,118	74HCT4094D,112
Description	counter shift registers 8-stage shift and	counter shift registers 8-stage shift and	counter shift registers 8-stage shift and	counter shift registers 8-stage bus register	counter shift registers 8-stage shift and	counter shift registers 8-stage shift and	counter shift registers 8-stage shift/store
Brand Name	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconductor	NXP Semiconductor
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Maker	NXP	NXP	NXP	NXP	NXP	NXP	NXP
Parts packaging code	TSSOP	SSOP1	SSOP1	SOP	SSOP1	TSSOP	SOP
package instruction	TSSOP, TSSOP16,.25	SSOP, SSOP16,.3	SSOP, SSOP16,.3	SOP, SOP16,.25	SSOP, SSOP16,.3	TSSOP, TSSOP16,.25	SOP, SOP16,.25
Contacts	16	16	16	16	16	16	16
Manufacturer packaging code	SOT403-1	SOT338-1	SOT338-1	SOT109-1	SOT338-1	SOT403-1	SOT109-1
Reach Compliance Code	compli	compli	compli	compli	compli	compliant	compliant
Other features	UNLATCHED SERIAL SHIFT RIGHT OUTPUT; PARALLEL OUTPUT IS LATCHED	UNLATCHED SERIAL SHIFT RIGHT OUTPUT; PARALLEL OUTPUT IS LATCHED	UNLATCHED SERIAL SHIFT RIGHT OUTPUT; PARALLEL OUTPUT IS LATCHED	PARALLEL OUTPUT IS LATCHED; UNLATCHED SERIAL SHIFT RIGHT OUTPUT	UNLATCHED SERIAL SHIFT RIGHT OUTPUT; PARALLEL OUTPUT IS LATCHED	UNLATCHED SERIAL SHIFT RIGHT OUTPUT; PARALLEL OUTPUT IS LATCHED	PARALLEL OUTPUT IS LATCHED; UNLATCHED SERIAL SHIFT RIGHT OUTPUT
Counting direction	RIGHT	RIGHT	RIGHT	RIGHT	RIGHT	RIGHT	RIGHT
series	HC/UH	HC/UH	HCT	HC/UH	HC/UH	HC/UH	HCT
JESD-30 code	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
JESD-609 code	e4	e4	e4	e4	e4	e4	e4
length	5 mm	6.2 mm	6.2 mm	9.9 mm	6.2 mm	5 mm	9.9 mm
Logic integrated circuit type	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT
Humidity sensitivity level	1	1	1	1	1	1	1
Number of digits	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1
Number of terminals	16	16	16	16	16	16	16
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SSOP	SSOP	SOP	SSOP	TSSOP	SOP
Encapsulate equivalent code	TSSOP16,.25	SSOP16,.3	SSOP16,.3	SOP16,.25	SSOP16,.3	TSSOP16,.25	SOP16,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260	260
power supply	2/6 V	2/6 V	5 V	2/6 V	2/6 V	2/6 V	5 V
propagation delay (tpd)	295 ns	295 ns	65 ns	295 ns	295 ns	295 ns	65 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.1 mm	2 mm	2 mm	1.75 mm	2 mm	1.1 mm	1.75 mm
Maximum supply voltage (Vsup)	6 V	6 V	5.5 V	6 V	6 V	6 V	5.5 V
Minimum supply voltage (Vsup)	2 V	2 V	4.5 V	2 V	2 V	2 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm	1.27 mm	0.65 mm	0.65 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30	30	30
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	4.4 mm	5.3 mm	5.3 mm	3.9 mm	5.3 mm	4.4 mm	3.9 mm
minfmax	24 MHz	24 MHz	20 MHz	24 MHz	103 MHz	103 MHz	20 MHz
Base Number Matches	1	1	1	1	1	1	1
Maximum Frequency@Nom-Su	24000000 Hz	24000000 Hz	24000000 Hz	24000000 Hz	20000000 Hz	-	-

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