LDLN015
150 mA - ultra low noise - high PSRR linear voltage regulator IC
Datasheet - production data
Description
The LDLN015 is an ultra low noise linear
regulator which provides 150 mA maximum
current from an input voltage ranging from 2.1 V
to 5.5 V with a typical dropout voltage of 86 mV.
With its 6.3 µ V
RMS
noise value in a band from
10 Hz to 100 kHz, the LDLN015 provides a very
clean output suitable for ultra sensitive loads. It is
stable with ceramic capacitors. High PSRR, low
quiescent current and very low noise features
make it suitable for low power battery powered
applications. Power supply rejection is higher
than 90 dB at low frequencies and starts to roll off
at 10 kHz. The enable logic control function puts
the LDLN015 into shutdown mode allowing a
total current consumption lower than 1 µA. The
device also includes a short-circuit constant
current limiting and thermal protection. Typical
applications are noise sensitive loads like ADC,
VCO in mobile phones, and personal digital
assistants (PDAs).
Features
Ultra low noise: 6.3 µV
RMS
from 10 Hz to
100 kHz
Input voltage from 2.1 to 5.5 V
Very low quiescent current (35 µA typ. at no
load, 70 µA typ. at 150 mA load; 2 µA max.
in off mode)
Output voltage tolerance: ± 1% at 25 °C
150 mA guaranteed output current
Wide range of output voltage from 0.8 V to
3.3 V with 100 mV step
Logic-controlled electronic shutdown
Compatible with ceramic capacitor
(C
OUT
= 0.47 µF)
No bypass capacitor is required
Internal current and thermal limit
Package DFN6 (2 x 2 mm)
Temperature range: - 40 °C to 125 °C
Order code
LDLN015PU10R
LDLN015PU12R
LDLN015PU15R
LDLN015PU18R
LDLN015PU25R
LDLN015PU28R
LDLN015PU30R
LDLN015PU33R
Table 1: Device summary
Output voltage (V)
1.0
1.2
1.5
1.8
2.5
2.8
3.0
3.3
May 2017
DocID022735 Rev 5
1/16
www.st.com
This is information on a product in full production.
Contents
LDLN015
Contents
1
2
3
4
5
6
Application diagram ........................................................................ 3
Pin configuration ............................................................................. 4
Maximum ratings ............................................................................. 5
Electrical characteristics ................................................................ 6
Typical performance characteristics ............................................. 8
Package information ..................................................................... 12
6.1
6.2
DFN6 (2 x 2 mm) package information ........................................... 12
DFN6 (2 x 2 mm) packing information ............................................. 14
7
Revision history ............................................................................ 15
2/16
DocID022735 Rev 5
LDLN015
Maximum ratings
3
Symbol
V
IN
V
OUT
V
EN
I
OUT
P
D
T
STG
T
OP
ESD
Maximum ratings
Table 3: Absolute maximum ratings
Parameter
DC input voltage
DC output voltage
Enable input voltage
Output current
Power dissipation
Storage temperature range
Operating junction temperature range
Human body model
Machine model
Value
-0.3 to 7
From -0.3 to 4.6
From -0.3 to V
IN
+ 0.3
Internally limited
Internally limited
-65 to 150
-40 to 125
±3
±300
Unit
V
V
V
mA
mW
°C
°C
kV
V
Absolute maximum ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied.
Table 4: Thermal data
Symbol
R
thJA
R
thJC
Parameter
Thermal resistance junction-ambient
Thermal resistance junction-case
Value
105
20
Unit
°C/W
°C/W
DocID022735 Rev 5
5/16
FPGA/CPLD
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