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8N4QV01BG-0103CDI

Description
LVDS Output Clock Oscillator
CategoryPassive components    oscillator   
File Size188KB,20 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

8N4QV01BG-0103CDI Overview

LVDS Output Clock Oscillator

8N4QV01BG-0103CDI Parametric

Parameter NameAttribute value
MakerIDT (Integrated Device Technology)
Reach Compliance Codecompli
Oscillator typeLVDS
Base Number Matches1
Quad-Frequency Programmable
VCXO
IDT8N4QV01 REV G
DATA SHEET
General Description
The IDT8N4QV01 is a Quad-Frequency Programmable VCXO with
very flexible frequency and pull-range programming capabilities.
The device uses IDT’s fourth generation FemtoClock® NG
technology for an optimum of high clock frequency and low phase
noise performance. The device accepts 2.5V or 3.3V supply and is
packaged in a small, lead-free (RoHS 6) 10-lead ceramic 5mm x
7mm x 1.55mm package.
Besides the 4 default power-up frequencies set by the FSEL0 and
FSEL1 pins, the IDT8N4QV01 can be programmed via the I
2
C
interface to any output clock frequency between 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz to a very high degree of
precision with a frequency step size of 435.9Hz ÷N (N is the PLL
output divider). Since the FSEL0 and FSEL1 pins are mapped to 4
independent PLL, P, M and N divider registers (P, MINT, MFRAC
and N), reprogramming those registers to other frequencies under
control of FSEL0 and FSEL1 is supported. The extended
temperature range supports wireless infrastructure, tele-
communication and networking end equipment requirements.
Features
Fourth generation FemtoClock® NG technology
Programmable clock output frequency from 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz
Four power-up default frequencies (see part number order
codes), re-programmable by I
2
C
I
2
C programming interface for the output clock frequency, APR
and internal PLL control registers
Frequency programming resolution is 435.9Hz ÷N
Absolute pull-range (APR) programmable from ±4.5ppm to
±754.5ppm
One 2.5V or 3.3V LVDS differential clock output
Two control inputs for the power-up default frequency
LVCMOS/LVTTL compatible control inputs
RMS phase jitter @ 156.25MHz (12kHz - 20MHz): 0.494ps
(typical)
RMS phase jitter @ 156.25MHz (1kHz - 40MHz): 0.594ps
(typical)
2.5V or 3.3V supply voltage modes
-40°C to 85°C ambient operating temperature
Available in Lead-free (RoHS 6) package
Block Diagram
OSC
114.285 MHz
÷MINT,
MFRAC
2
VC
FSEL1
FSEL0
SCLK
SDATA
OE
Pulldown
Pulldown
Pullup
Pullup
Pullup
Pin Assignment
÷P
PFD
&
LPF
FemtoClock® NG
VCO
1950-2600MHz
÷N
Q
nQ
VC 1
OE 2
GND 3
FSEL0 4
FSEL1 5
10 SCLK
9 SDATA
8 V
DD
7 nQ
6 Q
A/D
7
25
Configuration Register (ROM)
(Frequency, APR, Polarity)
I
2
C Control
7
IDT8N4QV01 REV G DATA SHEET
10-lead ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
IDT8N4QV01GCD
MARCH 6, 2012
1
©2012 Integrated Device Technology, Inc.

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Description LVDS Output Clock Oscillator LVDS Output Clock Oscillator LVDS Output Clock Oscillator LVDS Output Clock Oscillator LVDS Output Clock Oscillator LVDS Output Clock Oscillator LVDS Output Clock Oscillator
Reach Compliance Code compli compli compli compli compliant compliant compliant
Oscillator type LVDS LVDS LVDS LVDS LVDS LVDS LVDS
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) - -
Base Number Matches 1 1 1 1 - - -
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