Burr Brown Products
from Texas Instruments
DSD1793
SLES075A − MARCH 2003 − REVISED JANUARY 2004
24 BIT, 192 kHz SAMPLING, ADVANCED SEGMENT,
AUDIO STEREO DIGITAL TO ANALOG CONVERTER
FEATURES
D
Supports Both DSD and PCM Formats
D
24-Bit Resolution
D
Analog Performance:
− Dynamic Range: 113 dB
− THD+N: 0.001%
− Full-Scale Output: 2.1 V rms (at
Postamplifier)
D
Dual Supply Operation:
− 5-V Analog, 3.3-V Digital
D
5-V Tolerant Digital Inputs
D
Small 28-Lead SSOP Package, Lead-Free
Product
D
Differential Voltage Output: 3.2 V p-p
D
8× Oversampling Digital Filter:
− Stop-Band Attenuation: –82 dB
− Pass-Band Ripple:
±0.002
dB
D
Sampling Frequency: 10 kHz to 200 kHz
D
System Clock: 128, 192, 256, 384, 512, or
D
Accepts 16-, 20-, and 24-Bit Audio Data
D
PCM Data Formats: Standard, I
2
S, and
Left-Justified
768 f
S
With Autodetect
APPLICATIONS
D
A/V Receivers
D
SACD Players
D
DVD Players
D
HDTV Receivers
D
Car Audio Systems
D
Digital Multitrack Recorders
D
Other Applications Requiring 24-Bit Audio
DESCRIPTION
The DSD1793 is a monolithic CMOS integrated circuit that
includes stereo digital-to-analog converters and support
circuitry in a small 28-lead SSOP package. The data
converters use TI’s advanced-segment DAC architecture
to achieve excellent dynamic performance and improved
tolerance to clock jitter. The DSD1793 provides balanced
voltage outputs, allowing the user to optimize analog
performance externally. The DSD1793 accepts the PCM
and DSD audio data formats, providing easy interfacing to
audio DSP and decoder chips. The DSD1793 also accepts
interfaces to external digital filter devices (DF1704,
DF1706, PMD200). Sampling rates up to 200 kHz are
supported. A full set of user-programmable functions is
accessible through an I
2
C-compatible serial control port.
D
DSD Format Interface Available
D
Optional Interface to External Digital Filter or
DSP Available
D
I
2
C-Compatible Serial Port
D
User-Programmable Mode Controls:
− Digital Attenuation: 0 dB to –120 dB,
0.5 dB/Step
− Digital De-Emphasis
− Digital Filter Rolloff: Sharp or Slow
− Soft Mute
− Zero Flags for Each Output in PCM and
DSD Formats
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright
2004, Texas Instruments Incorporated
DSD1793
www.ti.com
SLES075A − MARCH 2003 − REVISED JANUARY 2004
ORDERING INFORMATION
PRODUCT
DSD1793DB
PACKAGE
28-lead SSOP
PACKAGE CODE
28DB
OPERATION
TEMPERATURE RANGE
−25°C to 85°C
PACKAGE
MARKING
DSD1793
ORDERING
NUMBER
DSD1793DB
DSD1793DBR
TRANSPORT
MEDIA
Tube
Tape and reel
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
DSD1791
Supply voltage
VCCF, VCCL, VCCC, VCCR
VDD
−0.3 V to 6.5 V
−0.3 V to 4 V
±0.1
V
±0.1
V
–0.3 V to 6.5 V
–0.3 V to (VDD + 0.3 V) < 4 V
–0.3 V to (VCC + 0.3 V) < 6.5 V
±10
mA
–40°C to 125°C
–55°C to 150°C
150°C
260°C, 5 s
260°C
Supply voltage differences: VCCF, VCCL, VCCC, VCCR
Ground voltage differences: AGNDF, AGNDL, AGNDC, AGNDR, DGND
Digital input voltage
Analog input voltage
Input current (any pins except supplies)
Ambient temperature under bias
Storage temperature
Junction temperature
Lead temperature (soldering)
Package temperature (IR reflow, peak)
PLRCK, PDATA, PBCK, DSDL, DSDR, DBCK, ADR0, ADR1, SCK, SCL, SDA
ZEROL, ZEROR
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
all specifications at TA = 25°C, VCC = 5 V, VDD = 3.3 V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data, unless otherwise noted
DSD1793DB
PARAMETER
RESOLUTION
DATA FORMAT (PCM Mode)
Audio data interface format
Audio data bit length
Audio data format
fS
Sampling frequency
System clock frequency
DATA FORMAT (DSD Mode)
Audio data interface format
Audio data bit length
fS
Sampling frequency
System clock frequency
2.8224
DSD (direct stream digital)
1 Bit
2.8224
11.2896
MHz
MHz
Standard, I2S, left justified
16-, 20-, 24-bit selectable
MSB first, 2s complement
10
200
kHz
128, 192, 256, 384, 512, 768 fS
MIN
TYP
24
MAX
UNIT
Bits
2
DSD1793
www.ti.com
SLES075A − MARCH 2003 − REVISED JANUARY 2004
ELECTRICAL CHARACTERISTICS (Continued)
all specifications at TA = 25°C, VCC = 5 V, VDD = 3.3 V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data, unless otherwise noted
DSD1793DB
PARAMETER
DIGITAL INPUT/OUTPUT
Logic family
VIH
VIL
IIH
IIL
VOH
VOL
Input logic level
Input logic current
Output logic level
VIN = VDD
VIN = 0 V
IOH = −2 mA
IOL = 2 mA
fS = 44.1 kHz
fS = 96 kHz
fS = 192 kHz
EIAJ, A-weighted, fS = 44.1 kHz
Dynamic range
EIAJ, A-weighted, fS = 96 kHz
EIAJ, A-weighted, fS = 192 kHz
EIAJ, A-weighted, fS = 44.1 kHz
Signal-to-noise ratio
EIAJ, A-weighted, fS = 96 kHz
EIAJ, A-weighted, fS = 192 kHz
Channel separation
Level linearity error
DYNAMIC PERFORMANCE (DSD MODE) (1) (2)
THD+N at VOUT = 0 dB
Dynamic range
Signal-to-noise ratio
ANALOG OUTPUT
Gain error
Gain mismatch, channel-to-channel
Bipolar zero error
Differential output voltage (3)
Bipolar zero voltage (3)
Load impedance (3)
At BPZ
Full scale (0 dB)
At BPZ
–8
–3
–2
±3
±0.5
±0.5
3.2
1.4
8
3
2
% of FSR
% of FSR
% of FSR
V p-p
V
2.1 V rms
–60 dB, EIAJ, A-weighted
EIAJ, A-weighted
0.001%
113
113
dB
dB
fS = 44.1 kHz
fS = 96 kHz
fS = 192 kHz
VOUT = –120 dB
106
110
110
2.4
0.4
0.001%
0.0015%
0.003%
113
113
113
113
113
113
110
110
109
±1
dB
dB
dB
dB
0.002%
TTL compatible
2
0.8
10
–10
VDC
µA
VDC
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DYNAMIC PERFORMANCE (PCM MODE) (1)
THD+N at VOUT = 0 dB
R1 = R2
1.7
kΩ
(1) Dynamic performance and dc accuracy are specified at the output of the postamplifier as shown in Figure 32. Analog performance specifications
are measured using the System Twot Cascade audio measurement system by Audio Precisiont in the averaging mode. For all
sampling-frequency operations, measurement bandwidth is limited with a 20-kHz AES17 filter.
(2) Analog performance in the DSD mode is specified as the DSD modulation index of 100%. This is equilvalent to PCM mode performance at
44.1 kHz and 64 fS.
(3) These parameters are defined at the DSD1793 output pins. Load impedances, R1 and R2, are input resistors of the postamplifier. They are defined
as dc-coupled loads.
Audio Precision and System Two are trademarks of Audio Precision, Inc.
Other trademarks are the property of their respective owners.
3
DSD1793
www.ti.com
SLES075A − MARCH 2003 − REVISED JANUARY 2004
ELECTRICAL CHARACTERISTICS (Continued)
all specifications at TA = 25°C, VCC = 5 V, VDD = 3.3 V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data, unless otherwise noted
DSD1793DB
PARAMETER
DIGITAL FILTER PERFORMANCE
De-emphasis error
FILTER CHARACTERISTICS-1: SHARP ROLLOFF
Pass band
Stop band
Pass-band ripple
Stop-band attenuation
Delay time
FILTER CHARACTERISTICS-2: SLOW ROLLOFF
Pass band
Stop band
Pass-band ripple
Stop-band attenuation
Delay time
POWER SUPPLY REQUIREMENTS
VDD
VCC
IDD
Supply current (1)
ICC
Voltage range
fS = 44.1 kHz
fS = 96 kHz
fS = 192 kHz
fS = 44.1 kHz
fS = 96 kHz
fS = 192 kHz
Power dissipation (1)
TEMPERATURE RANGE
Operation temperature
θ
JA
Thermal resistance
(1) Input is BPZ data.
28-pin SSOP
–25
100
85
°C
°C/W
fS = 44.1 kHz
fS = 96 kHz
fS = 192 kHz
3
4.5
3.3
5
6.5
13.5
28
14
15
16
90
120
170
110
mW
16
mA
3.6
5.5
8
mA
VDC
VDC
Stop band = 0.732 fS
–82
29/fS
±0.04
dB
–3 dB
0.732 fS
±0.002
dB
dB
s
0.274 fS
0.454 fS
Stop band = 0.546 fS
Stop band = 0.567 fS
–75
–82
29/fS
±0.002
dB
–3 dB
0.546 fS
±0.002
dB
dB
s
0.454 fS
0.49 fS
±0.1
dB
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4
DSD1793
www.ti.com
SLES075A − MARCH 2003 − REVISED JANUARY 2004
PIN ASSIGNMENTS
DSD1793
(TOP VIEW)
PLRCK
PBCK
PDATA
DBCK
SCK
ADR1
V
DD
DGND
AGNDF
V
CC
R
AGNDR
V
OUT
R−
V
OUT
R+
V
COM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADR0
SCL
SDA
DSDL
DSDR
ZEROL
ZEROR
V
CC
F
V
CC
L
AGNDL
V
OUT
L−
V
OUT
L+
AGNDC
V
CC
C
5
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