MC68HC908SR12
MC68HC08SR12
Technical Data
M68HC08
Microcontrollers
MC68HC908SR12/D
Rev. 4, 2/2002
WWW.MOTOROLA.COM/SEMICONDUCTORS
MC68HC908SR12
MC68HC08SR12
Technical Data
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© Motorola, Inc., 2002
MC68HC908SR12•MC68HC08SR12 — Rev. 4.0
MOTOROLA
Technical Data
Technical Data
3
Technical Data
To provide the most up-to-date information, the revision of our
documents on the World Wide Web will be the most current. Your printed
copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://www.motorola.com/semiconductors/
The following revision history table summarizes changes contained in
this document. For your convenience, the page number designators
have been linked to the appropriate location.
Revision History
Date
Revision
Level
Description
PTB0/SDA0, PTB1/SCL0, PTB2/SDA1/TxD, and
PTB3/SCL1/RxD pins — clarified these open-drain pins
throughout this document.
8.4.6 Programming the PLL
— deleted redundant step in
programming the PLL.
Figure 10-1 . Monitor Mode Circuit
— corrected connections
for PTA1 and PTA2.
Table 10-1 . Monitor Mode Signal Requirements and Options
— clarified clock input requirements for monitor mode entry.
Section 11. Timer Interface Module (TIM)
— timer
discrepancies corrected throughout this section.
February,
2002
4
18.5.1 Port C Data Register (PTC)
and
18.5.2 Data Direction
Register C (DDRC)
— added notes for PTC6 and PTC7 on
42-pin package.
Figure 19-3 . IRQ2 Block Diagram
and
19.5 IRQ1 and IRQ2
Pins
— corrected IRQ2 for BIH and BIL instructions.
Table 24-4 . 5V DC Electrical Characteristics
and
Table 24-5 .
3V DC Electrical Characteristics
— added additional I
DD
measurements.
Table 24-13 . Current Detection Electrical Characteristics
—
updated trip point values.
Appendix A. MC68HC08SR12
— added appendix for ROM part:
MC68HC08SR12.
Page
Number(s)
323, 254, 293
120
167
169
181
327, 329
338, 339
374, 376
382
393
Technical Data
4
Technical Data
MC68HC908SR12•MC68HC08SR12 — Rev. 4.0
MOTOROLA
Technical Data — MC68HC908SR12•MC68HC08SR12
List of Sections
Section 1. General Description . . . . . . . . . . . . . . . . . . . . 35
Section 2. Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Section 3. Random-Access Memory (RAM) . . . . . . . . . . 61
Section 4. FLASH Memory . . . . . . . . . . . . . . . . . . . . . . . . 63
Section 5. Configuration and Mask Option Registers
(CONFIG & MOR). . . . . . . . . . . . . . . . . . . . . . 73
Section 6. Central Processor Unit (CPU) . . . . . . . . . . . . 81
Section 7. Oscillator (OSC) . . . . . . . . . . . . . . . . . . . . . . 101
Section 8. Clock Generator Module (CGM) . . . . . . . . . . 111
Section 9. System Integration Module (SIM) . . . . . . . . 141
Section 10. Monitor ROM (MON) . . . . . . . . . . . . . . . . . . 165
Section 11. Timer Interface Module (TIM) . . . . . . . . . . . 181
Section 12. Timebase Module (TBM) . . . . . . . . . . . . . . . 205
Section 13. Pulse Width Modulator (PWM) . . . . . . . . . . 211
Section 14. Analog Module . . . . . . . . . . . . . . . . . . . . . . 221
Section 15. Analog-to-Digital Converter (ADC) . . . . . . 231
Section 16. Serial Communications Interface (SCI) . . . 251
Section 17. Multi-Master IIC Interface (MMIIC) . . . . . . . 291
Section 18. Input/Output (I/O) Ports . . . . . . . . . . . . . . . 317
Section 19. External Interrupt (IRQ) . . . . . . . . . . . . . . . 335
MC68HC908SR12•MC68HC08SR12 — Rev. 4.0
MOTOROLA
List of Sections
Technical Data
5
FPGA/CPLD
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