74LVC07APW/AUJ datasheet, PDF - EEWORLD Datasheet

74LVC07APW/AUJ: DescriptionBuffer/Driver 6-CH Non-Inverting Open Drain CMOS 14-Pin TSSOP T/R; CategoryBuffer and line drives; File Size775KB，10 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LVC07APW/AUJ Overview

Buffer/Driver 6-CH Non-Inverting Open Drain CMOS 14-Pin TSSOP T/R

Parameter Name	Attribute value
EU restricts the use of certain hazardous substances	Supplier Unconfirmed
ECCN (US)	EAR99
Part Status	Unconfirmed
Logic Family	LVC
Logic Function	Buffer/Driver
Number of Elements per Chip	6
Number of Channels per Chip	6
Number of Inputs per Chip	6
Number of Input Enables per Chip	0
Number of Outputs per Chip	6
Number of Output Enables per Chip	0
Bus Hold	No
Polarity	Non-Inverting
Maximum Propagation Delay Time @ Maximum CL (ns)	2.5(Typ)@3.3V\|2.1(Typ)@2.7V\|1.6(Typ)@5V
Absolute Propagation Delay Time (ns)	6.5
Process Technology	CMOS
Input Signal Type	Single-Ended
Output Type	Open Drain
Maximum Low Level Output Current (mA)	32
Minimum Operating Supply Voltage (V)	1.2
Typical Operating Supply Voltage (V)	1.8\|2.5\|3.3\|5
Maximum Operating Supply Voltage (V)	5.5
Tolerant I/Os (V)	5
Typical Quiescent Current (uA)	0.1
Maximum Quiescent Current (uA)	10
Propagation Delay Test Condition (pF)	50
Maximum Power Dissipation (mW)	500
Minimum Operating Temperature (°C)	-40
Maximum Operating Temperature (°C)	125
Packaging	Tape and Reel
Supplier Package	TSSOP
Pin Count	14
Mounting	Surface Mount
Package Height	0.95(Max)
Package Length	5.1(Max)
Package Width	4.5(Max)
PCB changed	14

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