DS1744WP+120 datasheet, PDF - EEWORLD Datasheet

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DS1744WP+120: DescriptionReal Time Clock, Non-Volatile, 0 Timer(s), CMOS, LEAD FREE, POWERCAP MODULE-34; CategoryThe embedded processor and controller Microcontrollers and processors; File Size434KB，16 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html; Environmental Compliance

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DS1744WP+120 Overview

Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, LEAD FREE, POWERCAP MODULE-34

DS1744WP+120 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Maxim
Parts packaging code	DMA
package instruction	, MODULE,34LEAD,1.0
Contacts	34
Reach Compliance Code	not_compliant
ECCN code	EAR99
maximum clock frequency	0.032 MHz
External data bus width	8
Information access methods	PARALLEL, DIRECT ADDRESS
interrupt capability	N
JESD-30 code	R-XDMA-U34
JESD-609 code	e3
Number of terminals	34
Number of timers
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	UNSPECIFIED
Encapsulate equivalent code	MODULE,34LEAD,1.0
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	J INVERTED
Terminal location	DUAL
shortest time	SECONDS
Maximum time at peak reflow temperature	NOT SPECIFIED
Volatile	NO
uPs/uCs/peripheral integrated circuit type	TIMER, REAL TIME CLOCK
Base Number Matches	1

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Y2K-Compliant, Nonvolatile Timekeeping RAMs

DS1744/DS1744P

FEATURES



Integrated NV SRAM, Real-Time Clock,

Crystal, Power-Fail Control Circuit, and

Lithium Energy Source

Clock Registers are Accessed Identically to

the Static RAM. These Registers are Resident

in the Eight Top RAM Locations.

Century Byte Register (i.e., Y2K Compliant)

Totally Nonvolatile with Over 10 Years of

Operation in the Absence of Power

BCD-Coded Century, Year, Month, Date,

Day, Hours, Minutes, and Seconds with

Automatic Leap-Year Compensation Valid

Up to the Year 2100

Battery Voltage-Level Indicator Flag

Power-Fail Write Protection Allows for ±10%

Power-Supply Tolerance

Lithium Energy Source is Electrically

Disconnected to Retain Freshness Until

Power is Applied for the First Time

DIP Module Only

Standard JEDEC Byte-Wide 32k x 8 Static

RAM Pinout

PowerCap Module Board Only

Surface-Mountable Package for Direct

Connection to PowerCap Containing

Battery and Crystal

Replaceable Battery (PowerCap)

Power-On Reset Output

Pin-for-Pin Compatible with Other Densities

of DS174xP Timekeeping RAM

Also Available in Industrial Temperature

Range: -40°C to +85°C

UL Recognized

PIN CONFIGURATIONS

TOP VIEW

A14

A12

DQ0

DQ1

DQ2

GND

DS1744

A13

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3

EDIP

N.C.

RST

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

GND

DS1744P

GND

BAT

N.C.

A14

A13

A12

A11

A10

(Uses DS9034PCX+ or DS9034I-PCX+ PowerCap)

PowerCap MODULE BOARD

1 of 16

19-5502; Rev 6/13

DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs

Table 1. Truth Table

> V

< V

MODE

Deselect

Write

Read

Deselect

High-Z

Data In

Data Out

High-Z

POWER

Standby

Active

CMOS Standby

Data-Retention Mode

SETTING THE CLOCK

As shown in Table 2, bit 7 of the Control register is the W (write) bit. Setting the W bit to 1 halts updates

to the device registers. The user can subsequently load correct date and time values into all eight registers,

followed by a write cycle of 00h to the Control register to clear the W bit and transfer those new settings

into the clock, allowing timekeeping operations to resume from the new set point.

Again referring to Table 2, bit 6 of the Control register is the R (read) bit. Setting the R bit to 1 halts

updates to the device registers. The user can subsequently read the date and time values from the eight

registers without those contents possibly changing during those I/O operations. A subsequent write cycle

of 00h to the Control register to clear the R bit allows timekeeping operations to resume from the

previous set point.

The pre-existing contents of the Control register bits 0:5 (Century value) are ignored/unmodified by a

write cycle to Control if either the W or R bits are being set to 1 in that write operation.

The pre-existing contents of the Control register bits 0:5 (Century value) will be modified by a write

cycle to Control if the W bit is being cleared to 0 in that write operation.

The pre-existing contents of the Control register bits 0:5 (Century value) will not be modified by a write

cycle to Control if the R bit is being cleared to 0 in that write operation.

The clock oscillator can be stopped at any time. To increase the shelf life, the oscillator can be turned off

to minimize current drain from the battery. The OSC bit is the MSB (bit 7) of the seconds registers (Table

2). Setting it to a 1 stops the oscillator.

STOPPING AND STARTING THE CLOCK OSCILLATOR

FREQUENCY TEST BIT

As shown in Table 2, bit 6 of the day byte is the frequency test bit. When the frequency test bit is set to

logic 1 and the oscillator is running, the LSB of the seconds register toggles at 512Hz. When the seconds

valid (i.e., CE low, OE low, WE high, and address for seconds register remain valid and stable).

CLOCK ACCURACY (DIP MODULE)

The DS1744 is guaranteed to keep time accuracy to within

±1

minute per month at +25°C. The RTC is

calibrated at the factory by Maxim using nonvolatile tuning elements, and does not require additional

calibration. For this reason, methods of field clock calibration are not available and not necessary. Clock

accuracy is also affected by the electrical environment; caution should be taken to place the RTC in the

lowest-level EMI section of the PC board layout. For additional information, refer to Application Note 58.

5 of 16

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