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74F27

Description
triple 3-input nor gate
File Size48KB,4 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet View All

74F27 Overview

triple 3-input nor gate

74F27 Triple 3-Input NOR Gate
April 1988
Revised August 1999
74F27
Triple 3-Input NOR Gate
General Description
This device contains three independent gates, each of
which performs the logic NOR function.
Ordering Code:
Order Number
74F27SC
74F27SJ
74F27PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
Pin Names Description
U.L.
Input I
IH
/I
IL
Function Table
Inputs
A
n
L
X
X
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Output
C
n
L
H
X
X
O
n
H
L
L
L
HIGH/LOW Output I
OH
/I
OL
A
n
, B
n
, C
n
O
n
Data Inputs
Data Outputs
1.0/1.0
50/33.3
20
µA/−0.6
mA
−1
mA/20 mA
B
n
L
X
H
X
© 1999 Fairchild Semiconductor Corporation
DS009539
www.fairchildsemi.com
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