CD4012BM96E4 datasheet, PDF - EEWORLD Datasheet

CD4012BM96E4: DescriptionCMOS Dual 4-Input NAND Gate 14-SOIC -55 to 125; Categorylogic logic; File Size510KB，13 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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CMOS Dual 4-Input NAND Gate 14-SOIC -55 to 125

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	SOIC
package instruction	SOP, SOP14,.25
Contacts	14
Reach Compliance Code	compliant
Factory Lead Time	6 weeks
series	4000/14000/40000
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	8.65 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.0068 A
Humidity sensitivity level	1
Number of functions	2
Number of entries	4
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP14,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	5/15 V
Maximum supply current (ICC)	0.03 mA
Prop。Delay @ Nom-Sup	250 ns
propagation delay (tpd)	250 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	18 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	3.9 mm
Base Number Matches	1

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