64-Position OTP Digital Potentiometer
AD5171
FEATURES
64 position
One-time programmable (OTP) set-and-forget resistance
setting—low cost alternative over EEMEM
Unlimited adjustments prior to OTP activation
5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ end-to-end resistance
Low temperature coefficient: 5 ppm/°C in potentiometer mode
Low temperature coefficient: 35 ppm/°C in rheostat mode
Compact standard 8-lead SOT-23 package
Low power: I
DD
= 10 μA maximum
Fast settling time: t
S
= 5 μs typical in power-up
I
2
C-compatible digital interface
Computer software replaces microcontroller in factory
programming applications
Full read/write of wiper register
Extra I
2
C device address pin
Low operating voltage: 2.7 V to 5.5 V
OTP validation check function
Automotive temperature range: −40°C to +125°C
SCL
SDA
I
2
C INTERFACE
AND
CONTROL LOGIC
FUNCTIONAL BLOCK DIAGRAM
A
W
AD0
B
V
DD
GND
FUSE
LINK
WIPER
REGISTER
AD5171
Figure 1.
W
1
V
DD 2
8
A
SCL
4
5
SDA
Figure 2. Pin Configuration
APPLICATIONS
System calibrations
Electronics level settings
Mechanical trimmers and potentiometer replacements
Automotive electronics adjustments
Gain control and offset adjustments
Transducer circuit adjustments
Programmable filters up to 1.5 MHz BW
1
When this permanent setting is achieved, the value does not
change regardless of supply variations or environmental stresses
under normal operating conditions. To verify the success of
permanent programming, Analog Devices, Inc., patterned the
OTP validation such that the fuse status can be discerned from
two validation bits in read mode.
For applications that program the AD5171 in factories, Analog
Devices offers device programming software that operates
across Windows® 95 to XP platforms, including Windows NT.
This software application effectively replaces the need for external
I
2
C controllers or host processors and, therefore, significantly
reduces the development time of the users.
An AD5171 evaluation kit includes the software, connector, and
cable that can be converted for factory programming applications.
The AD5171 is available in a compact 8-lead SOT-23 package.
All parts are guaranteed to operate over the automotive temper-
ature range of −40°C to +125°C. Besides its unique OTP feature,
the AD5171 lends itself well to other general-purpose digital
potentiometer applications due to its temperature performance,
small form factor, and low cost.
GENERAL DESCRIPTION
The AD5171 is a 64-position, one-time programmable (OTP)
digital potentiometer
2
that uses fuse link technology to achieve
the memory retention of the resistance setting function. OTP is
a cost-effective alternative over the EEMEM approach for users
who do not need to reprogram new memory settings in the
digital potentiometer. This device performs the same electronic
adjustment function as most mechanical trimmers and variable
resistors. The AD5171 is programmed using a 2-wire, I
2
C®-
compatible digital control. It allows unlimited adjustments
before permanently setting the resistance value. During the
OTP activation, a permanent fuse blown command is sent after the
final value is determined, freezing the wiper position at a given
setting (analogous to placing epoxy on a mechanical trimmer).
1
2
Applies to 5 kΩ parts only.
The terms digital potentiometer and RDAC are used interchangeably.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2004–2008 Analog Devices, Inc. All rights reserved.
03437-002
7
B
TOP VIEW
GND
3
(Not to Scale)
6
AD0
AD5171
03437-001
AD5171
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics: 5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ .. 3
Timing Characteristics: 5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ ...... 5
Absolute Maximum Ratings............................................................ 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 12
One-Time Programming (OTP) .............................................. 12
Variable Resistance and Voltage for Rheostat Mode ............. 13
Variable Resistance and Voltage for Potentiometer Mode .... 13
Power Supply Considerations ................................................... 14
ESD Protection ........................................................................... 14
Terminal Voltage Operating Range.......................................... 15
Power-Up/Power-Down Sequences ......................................... 15
Controlling the AD5171 ................................................................ 16
Software Programming ............................................................. 16
Device Programming ................................................................. 16
I
2
C Controller Programming .................................................... 17
I
2
C-Compatible 2-Wire Serial Bus ........................................... 17
Controlling Two Devices on One Bus ..................................... 18
Applications Information .............................................................. 19
DAC.............................................................................................. 19
Gain Control Compensation .................................................... 19
Programmable Voltage Source with Boosted Output ........... 19
Level Shifting for Different Voltage Operation ...................... 19
Resistance Scaling ...................................................................... 19
Resolution Enhancement .......................................................... 20
RDAC Circuit Simulation Model ............................................. 20
Evaluation Board ............................................................................ 21
Outline Dimensions ....................................................................... 22
Ordering Guide .......................................................................... 22
REVISION HISTORY
7/08—Rev.
C to Rev. D
Changes to Power Supplies Parameter in Table 1.........................3
Updated Fuse Blow Condition to 400 ms Throughout ...............5
1/08—Rev. B to Rev. C
Updated Format .................................................................. Universal
Deleted Note 1; Renumbered Sequentially ................................... 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 5
Changes to Table 3 ............................................................................ 6
Changes to Table 4 ............................................................................ 7
Changes to Figure 13 to Figure 16 .................................................. 9
Changes to Figure 17 and Figure 18 ............................................. 10
Inserted Figure 24 ........................................................................... 11
Changes to One-Time Programming (OTP) Section and Power
Supply Considerations Section ..................................................... 12
Deleted Figure 25 and Figure 26 ................................................... 13
Updated Outline Dimensions ....................................................... 22
Changes to Ordering Guide .......................................................... 22
1/05—Rev. A to Rev. B
Change to Features ............................................................................1
Changes to Electrical Characteristics .............................................3
Change to Table 3 ..............................................................................6
Changes to Power Supply Considerations Section .................... 13
Changes to Level Shifting for Different Voltage Operation
Section.............................................................................................. 19
Added Note to Ordering Guide .................................................... 22
11/04—Rev. 0 to Rev. A
Changes to Specifications .................................................................3
Changes to Table 3.............................................................................7
Changes to One-Time Programming Section ............................ 11
Changes to Power Supply Consideration Section ...................... 11
Changes to Figure 26 and Figure 27............................................. 12
1/04—Revision 0: Initial Version
Rev. D | Page 2 of 24
AD5171
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS: 5 kΩ, 10 kΩ, 50 kΩ, AND 100 kΩ
V
DD
= 3 V to 5 V ± 10%, V
A
= V
DD
, V
B
= 0 V, −40°C < T
A
< +125°C, unless otherwise noted.
Table 1.
Parameter
DC CHARACTERISTICS RHEOSTAT MODE
Resistor Differential Nonlinearity
2
Symbol
R-DNL
Conditions
R
WB
, V
A
= no connect,
R
AB
= 10 kΩ, 50 kΩ, and 100 kΩ
R
WB
, V
A
= no connect, R
AB
= 5 kΩ
R
WB
, V
A
= no connect,
R
AB
= 10 kΩ, 50 kΩ, and 100 kΩ
R
WB
, V
A
= no connect, R
AB
= 5 kΩ
Min
−0.5
−1
−1.5
−1.5
−30
Typ
1
±0.1
±0.25
±0.35
±0.5
35
60
Max
+0.5
+1
+1.5
+1.5
+30
115
Unit
LSB
LSB
LSB
LSB
%
ppm/°C
Ω
Resistor Integral Nonlinearity
2
R-INL
Nominal Resistor Tolerance
Resistance Temperature Coefficient
Wiper Resistance
DC CHARACTERISTICS POTENTIOMETER DIVIDER
MODE (SPECIFICATIONS APPLY TO ALL RDACs)
Resolution
Differential Nonlinearity
4
Integral Nonlinearity
4
Voltage Divider Temperature Coefficient
Full-Scale Error
Full-Scale Error
Zero-Scale Error
3
∆R
AB
/R
AB
(∆R
AB
/R
AB
)/∆T
R
W
V
DD
= 5 V
N
DNL
INL
(∆V
W
/V
W
)/∆T
V
WFSE
V
WFSE
V
WZSE
−0.5
−1
Code = 0x20
Code = 0x3F, R
AB
= 10 kΩ,
50 kΩ, and 100 kΩ
Code = 0x3F, R
AB
= 5 kΩ
Code = 0x00, R
AB
=10 kΩ,
50 kΩ, and 100 kΩ
Code = 0x00, R
AB
= 5 kΩ
With respect to GND
f = 1 MHz, measured to GND,
code = 0x20
f = 1 MHz, measured to GND,
code = 0x20
V
A
= V
B
= V
DD
/2
0.7 V
DD
−0.5
3.0
0
−1
−1.5
0
0
±0.1
±0.2
5
−0.5
6
+0.5
+1
0
0
1
2
V
DD
Bits
LSB
LSB
ppm/°C
LSB
LSB
LSB
LSB
V
pF
pF
nA
0.5
RESISTOR TERMINALS
Voltage Range
5
Capacitance A, B
6
Capacitance W
6
Common-Mode Leakage
DIGITAL INPUTS
Input Logic High (SDA and SCL)
7
Input Logic Low (SDA and SCL)
7
Input Logic High (AD0)
Input Logic Low (AD0)
Input Current
Input Capacitance
8
DIGITAL OUTPUTS
Output Logic Low (SDA)
Three-State Leakage Current (SDA)
Output Capacitance
8
POWER SUPPLIES
Power Supply Range
OTP Power Supply
7, 9
Supply Current
OTP Supply Current
7, 10, 11
Power Dissipation
12
Power Supply Sensitivity
V
A,
V
B,
V
W
C
A,
C
B
C
W
I
CM
V
IH
V
IL
V
IH
V
IL
I
IL
C
IL
V
OL
I
OZ
C
OZ
V
DD
V
DD_OTP
I
DD
I
DD_OTP
P
DISS
PSSR
25
55
1
V
DD
+ 0.5
+0.3 V
DD
V
DD
1.0
±1
3
V
DD
= 3 V
V
DD
= 3 V
V
IN
= 0 V or 5 V
V
V
V
V
μA
pF
V
μA
pF
V
V
μA
mA
mW
%/%
I
OL
= 6 mA
V
IN
= 0 V or 5 V
3
2.7
4.75
0.4
±1
T
A
= 25°C
V
IH
= 5 V or V
IL
= 0 V
V
DD_OTP
= 5 V, T
A
= 25°C
V
IH
= 5 V or V
IL
= 0 V, V
DD
= 5 V
−0.025
5
4
100
0.02
+0.001
5.5
5.25
10
0.055
+0.025
Rev. D | Page 3 of 24
AD5171
Parameter
DYNAMIC CHARACTERISTICS
8, 13, 14
–3 dB Bandwidth
Symbol
BW_5k
BW_10k
BW_50k
BW_100k
THD
t
S1
t
S2
e
N_WB
Conditions
R
AB
= 5 kΩ, code = 0x20
R
AB
= 10 kΩ, code = 0x20
R
AB
= 50 kΩ, code = 0x20
R
AB
= 100 kΩ, code = 0x20
V
A
= 1 V rms, R
AB
= 10 kΩ,
V
B
= 0 V dc, f = 1 kHz
V
A
= 5 V ± 1 LSB error band,
V
B
= 0 V, measured at V
W
V
A
= 5 V ±1 LSB error band,
V
B
= 0 V, measured at V
W
R
AB
= 5 kΩ, f = 1 kHz,
code = 0x20
R
AB
= 10 kΩ, f = 1 kHz,
code = 0x20
Min
Typ
1
1500
600
110
60
0.05
5
5
8
12
Max
Unit
kHz
kHz
kHz
kHz
%
μs
μs
nV/√Hz
nV/√Hz
Total Harmonic Distortion
Adjustment Settling Time
Power-Up Settling Time After Fuses Blown
Resistor Noise Voltage
1
2
Typical specifications represent average readings at 25°C and V
DD
= 5 V.
Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3
V
AB
= V
DD
, Wiper (V
W
) = no connect.
4
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
A
= V
DD
and V
B
= 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
The A, B, and W resistor terminals have no limitations on polarity with respect to each other.
6
Guaranteed by design; not subject to production test.
7
The minimum voltage requirement on the V
IH
is 0.7 V × V
DD
. For example, V
IH
minimum = 3.5 V when V
DD
= 5 V. It is typical for the SCL and SDA resistors to be pulled up
to V
DD
. However, care must be taken to ensure that the minimum V
IH
is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-
up resistors.
8
Guaranteed by design; not subject to production test.
9
Different from operating power supply; power supply for OTP is used one time only.
10
Different from operating current; supply current for OTP lasts approximately 400 ms for one-time need only.
11
See Figure 24 for the energy plot during the OTP program.
12
P
DISS
is calculated from (I
DD
× V
DD
). CMOS logic level inputs result in minimum power dissipation.
13
Bandwidth, noise, and settling time depend on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest
bandwidth. The highest R value results in the minimum overall power consumption.
14
All dynamic characteristics use V
DD
= 5 V.
Rev. D | Page 4 of 24
AD5171
TIMING CHARACTERISTICS: 5 kΩ, 10 kΩ, 50 kΩ, AND 100 kΩ
V
DD
= 3 V to 5 V ± 10%, V
A
= V
DD
, V
B
= 0 V, −40°C < T
A
< +125°C, unless otherwise noted.
Table 2.
Parameter
INTERFACE TIMING CHARACTERISTICS (APPLY TO ALL PARTS
2, 3
)
SCL Clock Frequency
t
BUF
Bus Free Time Between Start and Stop
t
HD;STA
Hold Time (Repeated Start)
t
LOW
Low Period of SCL Clock
t
HIGH
High Period of SCL Clock
t
SU;STA
Setup Time for Start Condition
t
HD;DAT
Data Hold Time
t
SU;DAT
Data Setup Time
t
F
Fall Time of Both SDA and SCL Signals
t
R
Rise Time of Both SDA and SCL Signals
t
SU;STO
Setup Time for Stop Condition
OTP Program Time
1
2
Symbol
f
SCL
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
Conditions
Min
Typ
1
Max
400
Unit
kHz
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
ms
After this period, the
first clock pulse is generated
1.3
0.6
1.3
0.6
0.6
0.1
0.3
0.3
0.6
400
50
0.9
Typical specifications represent average readings at 25°C and V
DD
= 5 V.
Guaranteed by design; not subject to production test.
3
All dynamic characteristics use V
DD
= 5 V.
t
8
t
9
t
6
SCL
t
2
t
3
t
8
SDA
t
4
t
9
t
5
t
7
t
10
t
1
P
S
P
03437-024
Figure 3. Interface Timing Diagram
Rev. D | Page 5 of 24
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