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IDT7037

Description
HIGH-SPEED 32K x 18 DUAL-PORT STATIC RAM
File Size151KB,17 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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IDT7037 Overview

HIGH-SPEED 32K x 18 DUAL-PORT STATIC RAM

HIGH-SPEED
32K x 18 DUAL-PORT
STATIC RAM
Features
x
x
x
IDT7037L
x
x
x
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
High-speed access
– Commercial: 15/20ns (max.)
Low-power operation
– IDT7037L
Active: 1W (typ.)
Standby: 1mW (typ.)
Dual chip enables allow for depth expansion without
external logic
IDT7037 easily expands data bus width to 36 bits or
more using the Master/Slave select when cascading more
than one device
x
x
x
x
x
x
x
x
M/S = V
IH
for
BUSY
output flag on Master,
M/S = V
IL
for
BUSY
input on Slave
Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
Separate upper-byte and lower-byte controls for multi-
plexed bus and bus matching compatibility
TTL-compatible, single 5V (±10%) power supply
Available in a 100-pin TQFP
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Functional Block Diagram
R/
W
L
UB
L
CE
0L
CE
1L
OE
L
LB
L
R/
W
R
UB
R
CE
0R
CE
1R
OE
R
LB
R
I/O
9-17L
I/O
0-8L
BUSY
L
(1,2)
A
14L
A
0L
32Kx18
MEMORY
ARRAY
7037
15
15
I/O
9-17R
I/O
Control
I/O
Control
I/O
0-8R
BUSY
R
A
14R
A
0R
(1,2)
Address
Decoder
Address
Decoder
CE
0L
CE
1L
OE
L
R/W
L
SEM
L
INT
L
(2)
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
0R
CE
1R
OE
R
R/W
R
SEM
R
(2)
INT
R
4838 drw 01
M/S
(1)
NOTES:
1.
BUSY
is an input as a Slave (M/S = V
IL
) and an output when it is a Master (M/S = V
IH
).
2.
BUSY
and
INT
are non-tri-state totem-pole outputs (push-pull).
JANUARY 2001
DSC-4838/2
1
©2000 Integrated Device Technology, Inc.

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