Data Sheet No. PD60019
Rev.P
IR2130/IR2132(J)(S) & (PbF)
3-PHASE BRIDGE DRIVER
Features
•
Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
•
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for all channels
Over-current shutdown turns off all six drivers
Independent half-bridge drivers
Matched propagation delay for all channels
2.5V logic compatible
Outputs out of phase with inputs
Cross-conduction prevention logic
Also available LEAD-FREE
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
(typ.)
Deadtime (typ.)
600V max.
200 mA / 420 mA
10 - 20V
675 & 425 ns
2.5 µs (IR2130)
0.8 µs (IR2132)
Description
Packages
The IR2130/IR2132(J)(S) is a high voltage, high speed
power MOSFET and IGBT driver with three indepen-
dent high and low side referenced output channels. Pro-
prietary HVIC technology enables ruggedized
28-Lead SOIC
monolithic construction. Logic inputs are compatible with
CMOS or LSTTL outputs, down to 2.5V logic. A
28-Lead PDIP
ground-referenced operational amplifier provides
analog feedback of bridge current via an external cur-
rent sense resistor. A current trip function which termi-
44-Lead PLCC w/o 12 Leads
nates all six outputs is also derived from this resistor.
An open drain
FAULT
signal indicates if an over-cur-
rent or undervoltage shutdown has occurred. The output drivers feature a high pulse current buffer stage designed
for minimum driver cross-conduction. Propagation delays are matched to simplify use at high frequencies. The
floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration
which operate up to 600 volts.
Typical Connection
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer
to our Application Notes and DesignTips for proper circuit board layout.
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1
IR2130/IR2132(J)(S) & (PbF)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to V
S0
. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.
Symbol
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
Definition
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
Low Side and Logic Fixed Supply Voltage
Logic Ground
Low Side Output Voltage
Logic Input Voltage (
HIN1,2,3
,
LIN1,2,3
& ITRIP)
Min.
-0.3
V
B1,2,3
- 25
V
S1,2,3
- 0.3
-0.3
V
CC
- 25
-0.3
V
SS
- 0.3
Max.
625
V
B1,2,3
+ 0.3
V
B1,2,3
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
(V
SS
+ 15) or
(V
CC
+ 0.3)
whichever is
lower
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
1.5
1.6
2.0
83
78
63
150
150
300
Units
V
V
FLT
V
CAO
V
CA-
dV
S
/dt
P
D
FAULT
Output Voltage
Operational Amplifier Output Voltage
Operational Amplifier Inverting Input Voltage
Allowable Offset Supply Voltage Transient
Package Power Dissipation @ T
A
≤
+25°C
Rth
JA
Thermal Resistance, Junction to Ambient
(28 Lead DIP)
(28 Lead SOIC)
(44 Lead PLCC)
(28 Lead DIP)
(28 Lead SOIC)
(44 Lead PLCC)
T
J
T
S
T
L
Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
V
SS
- 0.3
V
SS
- 0.3
V
SS
- 0.3
—
—
—
—
—
—
—
—
-55
—
V/ns
W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to V
S0
. The V
S
offset rating is tested
with all supplies biased at 15V differential.
Typical ratings at other bias conditions are shown in Figure 54.
Symbol
Definition
Min.
Max.
Units
V
B1,2,3
High Side Floating Supply Voltage
V
S1,2,3
+ 10
V
S1,2,3
+ 20
V
S1,2,3
High Side Floating Offset Voltage
Note 1
600
V
HO1,2,3
High Side Floating Output Voltage
V
S1,2,3
V
B1,2,3
V
CC
Low Side and Logic Fixed Supply Voltage
10
20
V
SS
Logic Ground
-5
5
V
LO1,2,3
Low Side Output Voltage
0
V
CC
V
V
IN
Logic Input Voltage (
HIN1,2,3
,
LIN1,2,3
& ITRIP)
V
SS
V
SS
+ 5
V
FLT
V
SS
V
CC
FAULT
Output Voltage
V
CAO
Operational Amplifier Output Voltage
V
SS
V
SS
+ 5
V
CA-
Operational Amplifier Inverting Input Voltage
V
SS
V
SS
+ 5
T
A
Ambient Temperature
-40
125
°C
Note 1: Logic operational for V
S
of (V
S0
- 5V) to (V
S0
+ 600V). Logic state held for V
S
of (V
S0
- 5V) to (V
S0
- V
BS
).
(Please refer to the Design Tip DT97-3 for more details).
Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode.
2
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IR2130/IR2132(J)(S) & (PbF)
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS1,2,3
) = 15V, V
S0,1,2,3
= V
SS
, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified. The dynamic
electrical characteristics are defined in Figures 3 through 5.
Symbol
t
on
t
off
t
r
t
f
t
itrip
t
bl
t
flt
t
flt,in
t
fltclr
DT
SR+
SR-
Definition
Turn-On Propagation Delay
Turn-Off Propagation Delay
Turn-On Rise Time
Turn-Off Fall Time
ITRIP to Output Shutdown Prop. Delay
ITRIP Blanking Time
ITRIP to
FAULT
Indication Delay
Input Filter Time (All Six Inputs)
LIN1,2,3
to
FAULT
Clear Time
Deadtime
(IR2130)
(IR2132)
Operational Amplifier Slew Rate (+)
Operational Amplifier Slew Rate (-)
Figure Min. Typ. Max. Units Test Conditions
11
12
13
14
15
—
16
—
17
18
18
19
20
500
300
—
—
400
—
335
—
6.0
1.3
0.4
4.4
2.4
675
425
80
35
660
400
590
310
9.0
2.5
0.8
6.2
3.2
850
550
125
55
920
—
845
—
12.0
3.7
1.2
—
—
V
IN
= 0 & 5V
V
S1,2,3
= 0 to 600V
V
IN
, V
ITRIP
= 0 & 5V
V
ITRIP
= 1V
V
IN
, V
ITRIP
= 0 & 5V
V
IN
= 0 & 5V
V
IN
, V
ITRIP
= 0 & 5V
V
IN
= 0 & 5V
ns
µs
V/µs
NOTE: For high side PWM, HIN pulse width must be
≥ 1.5µsec
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS1,2,3
) = 15V, V
S0,1,2,3
= V
SS
and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters
are referenced to V
SS
and are applicable to all six logic input leads:
HIN1,2,3
&
LIN1,2,3
. The V
O
and I
O
parameters
are referenced to V
S0,1,2,3
and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
Symbol
V
IH
V
IL
V
IT,TH+
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
I
ITRIP+
I
ITRIP-
V
BSUV+
V
BSUV-
V
CCUV+
V
CCUV-
R
on,FLT
Definition
Logic “0” Input Voltage (OUT = LO)
Logic “1” Input Voltage (OUT = HI)
ITRIP Input Positive Going Threshold
High Level Output Voltage, V
BIAS
- V
O
Low Level Output Voltage, V
O
Offset Supply Leakage Current
Quiescent V
BS
Supply Current
Quiescent V
CC
Supply Current
Logic “1” Input Bias Current (OUT = HI)
Logic “0” Input Bias Current (OUT = LO)
“High” ITRIP Bias Current
“Low” ITRIP Bias Current
V
BS
Supply Undervoltage Positive Going
Threshold
V
BS
Supply Undervoltage Negative Going
Threshold
V
CC
Supply Undervoltage Positive Going
Threshold
V
CC
Supply Undervoltage Negative Going
Threshold
FAULT
Low On-Resistance
Figure Min. Typ. Max. Units Test Conditions
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
2.2
—
400
—
—
—
—
—
—
—
—
—
7.5
7.1
8.3
8.0
—
—
—
490
—
—
—
15
3.0
450
225
75
—
8.35
7.95
9.0
8.7
55
—
0.8
580
100
100
50
30
4.0
650
400
150
100
9.2
8.8
9.7
9.4
75
Ω
V
V
mV
µA
mA
µA
nA
V
IN
= 0V, I
O
= 0A
V
IN
= 5V, I
O
= 0A
V
B
= V
S
= 600V
V
IN
= 0V or 5V
V
IN
= 0V or 5V
V
IN
= 0V
V
IN
= 5V
ITRIP = 5V
ITRIP = 0V
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3
IR2130/IR2132(J)(S) & (PbF)
Static Electrical Characteristics -- Continued
V
BIAS
(V
CC
, V
BS1,2,3
) = 15V, V
S0,1,2,3
= V
SS
and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters
are referenced to V
SS
and are applicable to all six logic input leads:
HIN1,2,3
&
LIN1,2,3
. The V
O
and I
O
parameters
are referenced to V
S0,1,2,3
and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
Symbol
I
O+
I
O-
V
OS
I
CA-
CMRR
PSRR
V
OH,AMP
V
OL,AMP
I
SRC,AMP
I
SRC,AMP
I
O+,AMP
I
O-,AMP
Definition
Output High Short Circuit Pulsed Current
Output Low Short Circuit Pulsed Current
Operational Amplifer Input Offset Voltage
CA- Input Bais Current
Op. Amp. Common Mode Rejection Ratio
Op. Amp. Power Supply Rejection Ratio
Op. Amp. High Level Output Voltage
Op. Amp. Low Level Output Voltage
Op. Amp. Output Source Current
Op. Amp. Output Sink Current
Operational Amplifier Output High Short
Circuit Current
Operational Amplifier Output Low Short
Circuit Current
Figure Min. Typ. Max. Units Test Conditions
38
39
40
41
42
43
44
45
46
47
48
49
200
420
—
—
60
55
5.0
—
2.3
1.0
—
—
250
500
—
—
80
75
5.2
—
4.0
2.1
4.5
3.2
—
—
30
4.0
—
—
5.4
20
—
—
mA
6.5
5.2
mA
mV
nA
dB
V
mV
V
O
= 0V, V
IN
= 0V
PW
≤
10
µs
V
O
= 15V, V
IN
= 5V
PW
≤
10
µs
V
S0
= V
CA-
= 0.2V
V
CA-
= 2.5V
V
S0
=V
CA-
=0.1V & 5V
V
S0
= V
CA-
= 0.2V
V
CC
= 10V & 20V
V
CA-
= 0V, V
S0
= 1V
V
CA-
= 1V, V
S0
= 0V
V
CA-
= 0V, V
S0
= 1V
V
CAO
= 4V
V
CA-
= 1V, V
S0
= 0V
V
CAO
= 2V
V
CA-
= 0V, V
S0
= 5V
V
CAO
= 0V
V
CA-
= 5V, V
S0
= 0V
V
CAO
= 5V
Lead Assignments
28 Lead PDIP
44 Lead PLCC w/o 12 Leads
28 Lead SOIC (Wide Body)
IR2130 / IR2132
IR2130J / IR2132J
Part Number
IR2130S / IR2132S
4
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IR2130/IR2132(J)(S) & (PbF)
Functional Block Diagram
Lead Definitions
Symbol
HIN1,2,3
LIN1,2,3
FAULT
V
CC
ITRIP
CAO
CA-
V
SS
V
B1,2,3
HO1,2,3
V
S1,2,3
LO1,2,3
V
S0
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Description
Logic inputs for high side gate driver outputs (HO1,2,3), out of phase
Logic inputs for low side gate driver output (LO1,2,3), out of phase
Indicates over-current or undervoltage lockout (low side) has occurred, negative logic
Low side and logic fixed supply
Input for over-current shutdown
Output of current amplifier
Negative input of current amplifier
Logic ground
High side floating supplies
High side gate drive outputs
High side floating supply returns
Low side gate drive outputs
Low side return and positive input of current amplifier
5
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