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DS26LS32MQML Quad Differential Line Receivers
October 2006
DS26LS32MQML
Quad Differential Line Receivers
General Description
The DS26LS32 and DS26LS32A are quad differential line
receivers designed to meet the RS-422, RS-423 and Federal
Standards 1020 and 1030 for balanced and unbalanced
digital data transmission.
The DS26LS32 and DS26LS32A have an input sensitivity of
200 mV over the input voltage range of
±
7V and the
DS26LS33 have an input sensitivity of 500 mV over the input
voltage range of
±
15V.
The DS26LS32A differ in function from the popular
DS26LS32 and DS26LS33 in that input pull-up and pull-
down resistors are included which prevent output oscillation
on unused channels.
Each version provides an enable and disable function com-
mon to all four receivers and features TRI-STATE
®
outputs
with 8 mA sink capability. Constructed using low power
Schottky processing, these devices are available over the
full military and commerical operating temperature ranges.
Features
n
High differential or common-mode input voltage ranges
of
±
7V on the DS26LS32.
n
±
0.2V sensitivity over the input voltage range on the
DS26LS32.
n
DS26LS32 meet all requirements of RS-422 and
RS-423
n
6k minimum input impedance
n
100 mV input hysteresis on the DS26LS32
n
Operation from a single 5V supply
n
TRI-STATE outputs, with choice of complementary
output enables for receiving directly onto a data bus
Ordering Information
NS Part Number
DS26LS32ME/883
DS26LS32MJ/883
DS26LS32MW/883
SMD Part Number
5962-7802006Q2A
5962-7802006QEA
5962-7802006QFA
NS Package Number
E20A
J16A
W16A
Package Description
20LD LEADLESS CHIP CARRIER
16LD CERDIP
16LD CERPACK
Logic Diagram
20141301
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
© 2006 National Semiconductor Corporation
DS201413
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DS26LS32MQML
Connection Diagrams
Dual-In-Line Package
20-Lead Ceramic Leadless Chip Carrier
20141302
Top View
See NS Package Number J16A or W16A
Top View
See NS Package Number E20A,
20141312
Truth Table
ENABLE
0
See
Note Below
TRI-STATE
®
ENABLE
1
Input
X
V
ID
≥
V
TH
(Max)
V
ID
≤
V
TH
(Min)
Output
Hi-Z
1
0
Hi-Z =
Note: Input conditions may be any combination not defined for ENABLE and ENABLE .
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2
DS26LS32MQML
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Common-Mode Range
Differential Input Voltage
Enable Voltage
Output Sink Current
Maximum Power Dissipation at 25˚C (Note 2)
J Package
E Package
W Package
Junction Temperature (T
J
)
Thermal Resistance, Junction-to-Ambient
θ
JA
J Package
E Package
W Package
Thermal Resistance, Junction-to-Ambient
θ
JC
Storage Temperature Range
Lead Temperature (Soldering, 4 seconds)
ESD Tolerance (Note 3)
100˚C/W
130˚C/W
140˚C/W
See MIL-STD-1835
−65˚C to +165˚C
260˚C
500V
1666.5 mW
1875 mW
967.74 mW
+150˚C
7V
±
25V
±
25V
7V
50 mA
Recommended Operating
Conditions
Supply Voltage, V
CC
Temperature, T
A
4.5 V to 5.5 V
−55˚C to +125˚C
Quality Conformance Inspection
MIL-STD-883, Method 5005 - Group A
Subgroup
1
2
3
4
5
6
7
8A
8B
9
10
11
Description
Static tests at
Static tests at
Static tests at
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Temp ( ˚C)
+25
+125
-55
+25
+125
-55
+25
+125
-55
+25
+125
-55
3
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DS26LS32MQML
DS26LS32M 883 Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified. V
CC
= 5V
Symbol
Parameter
Conditions
V
CC
= 5.5V, V
IN
= 15V (Pin
under test), other inputs -15V,
≤
V
IN
≤
+15V
V
CC
= 5.5V, V
IN
= -15V (Pin
under test), other inputs -15V,
≤
V
IN
≤
+15V
V
CC
= 5.5V, V
IN
= 0.4V
V
CC
= 5.5V, V
IN
= 2.7V
V
CC
=5.5V, V
IN
= 5.5V
V
CC
= 4.5V, I
OH
= -440uA,
∆V
IN
= 1V, V ENABLE = 0.8V
V
CC
= 4.5V, I
OL
= 4mA,
∆V
IN
= -1V, V ENABLE = 0.8V
V
CC
= 4.5V, I
OL
= 8mA,
∆V
IN
= -1V, V ENABLE = 0.8V
V
CC
= 5.5V, V
O
= 0V,
∆V
IN
= 1V
V
CC
= 5.5V, V
O
= 0V,
∆V
IN
= 1V
V
CC
= 5.5V, All V
IN
= GND,
Outputs Disabled
V
CC
= 5.5V, V
O
= 0.4V
V
CC
= 5.5V, V
O
= 2.4V
-7V
≤
V
CM
≤
7V
-15V
≤
V
CM
≤
15V
V
CC
= 4.5V
V
CC
= 4.5V
Notes
Min
Max
Unit
Sub-
groups
1, 2, 3
(Note 5)
2.3
mA
I
IN
Input Current
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Notes 4,
5)
(Note 5)
(Notes 4,
5)
(Notes 4,
5)
2
-0.2
6
-15
2.5
-2.8
-360
20
100
-1.5
mA
uA
uA
uA
V
V
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
I
IL
I
IH
I
I
V
IC
V
OH
Logical "0" ENABLE Current
Logical "1" ENABLE Current
Logical "1" ENABLE Current
Input Clamp Voltage (ENABLE) V
CC
= 4.5V, I
IN
= -18mA
Logical "1" Output Voltage
.4
.45
V
V
mA
V
OL
Logical "0" Output Voltage
I
OS
(MIN)
I
OS
(MAX)
I
CC
I
O
V
TH
R
IN
V
IL
V
IH
Output Short Circuit Current
Output Short Circuit Current
Supply Current
Off-State Output Current
Differential Input Voltage
Input Resistance
Logical "0" Input Voltage
(ENABLE)
Logical "1" Input Voltage
(ENABLE)
-85
70
-20
20
0.2
mA
mA
uA
uA
V
kohm
0.8
V
V
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