EEWORLDEEWORLDEEWORLD

Part Number

Search

PCM1772PW

Description
LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER
Categoryaccessories   
File Size293KB,29 Pages
ManufacturerBurr-Brown
Websitehttp://www.burr-brown.com/
Download Datasheet Compare View All

PCM1772PW Online Shopping

Suppliers Part Number Price MOQ In stock  
PCM1772PW - - View Buy Now

PCM1772PW Overview

LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER

Burr Brown Products
from Texas Instruments
PCM1772
PCM1773
SLES010D – SEPTEMBER 2001 – REVISED MAY 2004
LOW VOLTAGE AND LOW POWER STEREO AUDIO
DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPLIFIER
FEATURES
D
Multilevel DAC Including Lineout Amplifier
D
Analog Performance (V
CC1
, V
CC2
= 2.4 V):
D
D
− Dynamic Range: 98 dB Typ
− THD+N at 0 dB: 0.007% Typ
1.6-V to 3.6-V Single Power Supply
Low Power Dissipation: 6 mW at V
CC1
,
V
CC2
= 2.4 V
System Clock: 128 f
S
, 192 f
S
, 256 f
S
, 384 f
S
D
Packages: TSSOP-16 and VQFN-20, Lead Free
APPLICATIONS
D
Portable Audio Player
D
Cellular Phone
D
PDA
D
Other Applications Requiring Low-Voltage
Operation
D
D
Sampling Frequency: 5 kHz to 50 kHz
D
Software Control (PCM1772):
DESCRIPTION
The PCM1772 and PCM1773 devices are CMOS,
monolithic, integrated circuits which include stereo
digital-to-analog converters, lineout circuitry, and
support circuitry in small TSSOP-16 and VQFN-20
packages.
The data converters use TI’s enhanced multilevel
∆-Σ
architecture, which employs noise shaping and
multilevel amplitude quantization to achieve excellent
dynamic performance and improved tolerance to clock
jitter. The PCM1772 and PCM1773 devices accept
several industry standard audio data formats with 16- to
24-bit data, left-justified, I
2
S, etc., providing easy
interfacing to audio DSP and decoder devices.
Sampling rates up to 50 kHz are supported. A full set of
user-programmable functions are accessible through a
3-wire serial control port, which supports register write
functions.
D
16-, 20-, 24-Bit Word Available
Left-, Right-Justified, and I
2
S
Slave/Master Selectable
Digital Attenuation: 0 dB to
–62
dB,
1 dB/Step
− 44.1-kHz Digital De-Emphasis
− Zero Cross Attenuation
− Digital Soft Mute
− Monaural Analog-In With Mixing
− Monaural Speaker Mode
Hardware Control (PCM1773):
− Left-Justified and I
2
S
− 44.1-kHz Digital De-Emphasis
− Monaural Analog-In With Mixing
D
Pop-Noise-Free Circuit
D
3.3-V Tolerant
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright
2004, Texas Instruments Incorporated

PCM1772PW Related Products

PCM1772PW PCM1773RGAR PCM1773RGA PCM1773PWR PCM1773PW PCM1773 PCM1772RGAR PCM1772RGA PCM1772PWR PCM1772
Description LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER SERIAL INPUT LOADING, 24-BIT DAC, PDSO16 LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER
About CPLD structure and wiring method
Traditional CPLD is composed of macro units and uses global routing. Books say: The routing pool structure of CPLD is fixed, so the Pin to Pin delay is fixed. How do you understand the fixed routing p...
771235870 FPGA/CPLD
Circuit power-on abnormality
A self-locking circuit, IN_MOtor_Current_DET is input to MCU, OVC_Protect comes from the sampled voltage, VDD is 5V. After power on, without Q503, the 4, 5, and 6 pins of Q503 pad are all 5V, and the ...
Title. Analog electronics
Share some good things I saw in deyisupport
[align=left][url=http://www.deyisupport.com/blog/b/msp430/archive/2015/06/23/ti-msp432-mcu.aspx]Full explanation - Play with TI MSP432 MCU[/url][/align][align=left][/align] Abstract: The MSP430 produc...
wsxzaq TI Technology Forum
GPS screen as oscilloscope
I want to use GPS to modify the oscilloscope method, please give me some advice....
hymyfzgs DIY/Open Source Hardware
Homemade brushless motor ESC
Disassemble the hard drive motor, remove the original wires, and rewrap them with large electrical wires.  Stator, each wound 20 times, add a screw to facilitate future fixation     The rotor has not ...
凯哥 Creative Market
How to prevent the msp430f149 chip from being damaged by soldering?
I have an msp430f149 chip. When soldering, I fill the pins with solder and then remove the excess solder. Will this burn the chip? What should I pay attention to?...
husz Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 15  1551  736  984  485  1  32  15  20  10 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号