SY100S839VZI TR datasheet, PDF

Micrel, Inc.

÷

2/4,

÷

4/5/6 CLOCK

GENERATION CHIP

Precision Edge

®

SY100S839V

Precision Edge

®

SY100S839V

FEATURES

s

3.3V and 5V power supply option

s

50ps output-to-output skew

s

50% duty cycle outputs

s

Synchronous enable/disable

s

Master Reset for synchronization

s

Internal 75K

Ω

input pull-down resistors

s

Available in 20-pin SOIC package

Precision Edge

®

DESCRIPTION

The SY100S839V is a low skew

÷2/4, ÷4/5/6

clock

generation chip designed explicitly for low skew clock

generation applications. The internal dividers are

synchronous to each other, therefore, the common output

edges are all precisely aligned. The device can be driven

by either a differential or single-ended ECL/LVECL or, if

positive power supplies are used, PECL/LVPECL input

signal. In addition, by using the V

BB

output, a sinusoidal

source can be AC-coupled into the device. If a single-

ended input is to be used, the V

BB

output should be

connected to the /CLK input and bypassed to ground via

a 0.01µF capacitor. The V

BB

output is designed to act as

the switching reference for the input of the S839V under

single-ended input conditions. As a result, this pin can

only source/sink up to 0.5mA of current.

The common enable (/EN) is synchronous so that the

internal dividers will only be enabled/disabled when the

internal clock is already in the LOW state. This avoids

any chance of generating a runt clock pulse on the

internal clock when the device is enabled/disabled as

can happen with an asynchronous control. An internal

runt pulse could lead to losing synchronization between

the internal divider stages. The internal enable flip-flop is

clocked on the falling edge of the input clock, therefore,

all associated specification limits are referenced to the

negative edge of the clock input.

Upon start-up, the internal flip-flops will attain a

random state; the master reset (MR) input must be

asserted to ensure synchronization. For systems which

only use one S839V, the MR pin need not be exercised

as the internal divider designs ensures synchronization

between the

÷2/4,

and the

÷4/5/6

outputs of a single

device.

Precision Edge is a registered trademark of Micrel, Inc.

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

Rev.: B

Amendment: /0

1

Issue Date: March 2006

Micrel, Inc.

Precision Edge

®

SY100S839V

PACKAGE/ORDERING INFORMATION

Ordering Information

VCC

/EN

DIVSELb0

CLK

/CLK

VBB

MR

VCC

DIVSELb1

1

2

3

4

5

6

7

8

9

20 VCC

19 Q0

18 /Q0

17 Q1

16 /Q1

15 Q2

14 /Q2

13 Q3

12 /Q3

11 VEE

Part Number

SY100S839VZC

SY100S839VZCTR

(1)

SY100S839VZG

(2)

SY100S839VZGTR

(1, 2)

Package

Type

Z20-1

Operating

Range

Commercial

Industrial

Package

Marking

SY100S839VZC

SY100S839VZG with

Pb-Free bar-line indicator

SY100S839VZG with

Pb-Free bar-line indicator

Lead

Finish

Sn-Pb

Pb-Free

NiPdAu

Pb-Free

NiPdAu

DIVSELa 10

Notes:

1. Tape and Reel.

2. Pb-Free package is recommended for new designs.

20-Pin SOIC (Z20-1)

TRUTH TABLE

CLK

Z

ZZ

X

/EN

L

H

X

MR

L

H

Function

Divide

Hold Q

0–3

Reset Q

0–3

PIN NAMES

CLK

/EN

MR

V

BB

Q

0,

Q

1

Q

2,

Q

3

Q

0,

Q

1

OUTPUTS

Divide by 2

Divide by 4

Function

Differential Clock Inputs

Synchronous Enable

Master Reset

Reference Output

Differential

÷2/4

Outputs

Differential

÷4/5/6

Outputs

Frequency Select Input

Note:

Z = LOW-to-HIGH transition

ZZ = HIGH-to-LOW transition

DIVSELa

0

1

DIVSELb1

0

1

DIVSEL

DIVSELb0

0

1

0

1

Q

2,

Q

3

OUTPUTS

Divide by 4

Divide by 6

Divide by 5

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

2

Micrel, Inc.

Precision Edge

®

SY100S839V

DC ELECTRICAL CHARACTERISTICS

(1)

V

EE

= V

EE

(min) to V

EE

(max); V

CC

= GND

T

A =

–40

°

C

Symbol

I

EE

V

BB

I

IH

V

OH

V

OL

V

OHA

V

OLA

V

IH

V

IL

I

IL

Parameter

Power Supply Current

Output Reference

Voltage

Input High Current

Output HIGH Voltage

(2)

Output LOW Voltage

(2)

Output HIGH Voltage

(3)

Output LOW Voltage

(3)

Input HIGH Voltage

Input LOW Voltage

Input LOW Current

(4)

Min.

—

–1.38

—

T

A =

0

°

C

Min.

—

–1.38

—

–1025

T

A =

+25

°

C

Max.

95

–1.26

150

–880

T

A =

+85

°

C

Min.

—

–1.38

—

–1025

Typ.

50

—

Max.

95

–1.26

150

–880

Typ.

50

—

–955

Min.

—

–1.38

—

–1025

Typ.

50

—

–955

Max.

95

–1.26

150

–880

Typ.

54

—

–955

Max.

95

–1.26

150

–880

Unit

mA

V

µA

mV

µA

–1085 –1005

–1830 –1695 –1555 –1810 –1705 –1620 –1810 –1705 –1620 –1810 –1705 –1620

–1095

—

–1165

–1810

0.5

—

–1555

–880

–1035

—

–1165

—

–1610

–880

–1035

—

–1165

—

–1610

–880

–1035

—

–1165

—

–1610

–880

–1475

—

–1475 –1810

—

0.5

–1475 –1810

—

0.5

–1475 –1810

—

0.5

Note:

1. Parametric values specified at: -3.0V to -3.8V or -4.2V to -5.5V.

2. V

IN

= V

IH

(Max) or V

IL

(Min): Loading with 50Ω to –2.0V.

3. V

IN

= V

IH

(Min) or V

IL

(Max): Loading with 50Ω to –2.0V.

4. V

IN

= V

IL

(Min).

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

3

Micrel, Inc.

Precision Edge

®

SY100S839V

AC ELECTRICAL CHARACTERISTICS

(1)

V

EE

= V

EE

(min) to V

EE

(max); V

CC

= GND

T

A

= –40

°

C

Symbol

f

MAX

t

PD

Parameter

Maximum Toggle Frequency

Propagation Delay to Output

CLK

➝

Output (Diff.)

CLK

➝

Output (S.E.)

MR

➝

Output

Within-Device Skew

(2)

Q

0

— Q

3

Part-to-Part

t

S

t

H

V

PP

V

CMR

Set-up Time

Hold Time

Q

0

— Q

3

(Diff.)

/EN

➝

/CLK

DIVSEL

➝

CLK

/CLK

➝

/EN

CLK

➝

DIVSEL

CLK

1000

725

675

600

—

250

400

100

150

250

-1.6

—

CLK

MR

Q

500

700

280

—

925

975

900

50

200

—

-0.4

100

—

550

T

A

= 0

°

C

1000

725

675

600

—

250

400

100

150

250

-1.7

—

500

700

280

—

925

975

900

50

200

—

-0.4

100

—

550

T

A

= +25

°

C

1000

725

675

610

—

250

400

100

150

250

-1.7

—

500

700

280

—

925

975

910

50

200

—

-0.4

100

—

550

T

A

= +85

°

C

Unit

MHz

ps

725

675

630

—

250

400

100

150

250

-1.7

—

500

700

280

—

925

975

930

50

200

—

-0.4

100

—

550

ps

mV

V

ps

1000

—

Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.

t

skew

Minimum Input Swing

(3)

Common Mode Range

(4), (5)

Reset Recovery Time

Minimum Pulse Width

Output Rise/Fall Times

(20% —80%)

t

RR

t

PW

tr

t

f

Notes:

1. Parametric values specified at:

-3.0V to -3.8V or -4.2V to -5.5V.

2. Skew is measured between outputs under identical transitions.

3. Minimum input swing for which AC parameters are guaranteed. The device will function reliably with differential inputs down to 100mV.

4. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified

range and the peak-to-peak voltage lies between V

PP

min. and 1V. The lower end of the CMR range varies 1:1 with V

EE

. The numbers in the spec table

assume a nominal V

EE

= –3.3V. Note for PECL operation, the V

CMR

(min) will be fixed at 3.3V – IV

CMR

(min)I.

5. Duty Cycle: (Min. 48%; Max. 52%) } over temp.

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

4

Micrel, Inc.

Precision Edge

®

SY100S839V

LOGIC DIAGRAM

DIVSELa

(÷ 2/4)

CLK

R

Q

0

Q

0

Q

1

Q

1

EN

(÷4/5/6)

Q

2

Q

2

Q

3

V

BB

R

MR

DIVSELb0

DIVSELb1

Q

3

TIMING DIAGRAMS

CLK

Q (÷ 2)

Q (÷ 4)

Q (÷ 5)

Q (÷ 6)

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

5

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