TC74AC74P datasheet, PDF - EEWORLD Datasheet

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TC74AC74P: DescriptionIC D-type pos trg dual 14dip; Categorylogic logic; File Size224KB，9 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/; Environmental Compliance

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TC74AC74P Overview

IC D-type pos trg dual 14dip

TC74AC74P Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknown
series	AC
JESD-30 code	R-PDIP-T14
length	19.25 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	D FLIP-FLOP
Maximum Frequency@Nom-Sup	60000000 Hz
MaximumI(ol)	0.012 A
Number of digits	1
Number of functions	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3/5 V
propagation delay (tpd)	16 ns
Certification status	Not Qualified
Maximum seat height	4.45 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	7.62 mm
minfmax	100 MHz
Base Number Matches	1

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TC74AC74P/F/FT

TOSHIBA CMOS Digital Integrated Circuit

Silicon Monolithic

TC74AC74P, TC74AC74F, TC74AC74FT

Dual D-Type Flip Flop with Preset and Clear

The TC74AC74 is an advanced high speed CMOS D-FLIP

FLOP fabricated with silicon gate and double-layer metal wiring

MOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

The signal level applied to the D INPUT is transferred to Q

OUTPUT during the positive going transition of the CK pulse.

CLR

and

are independent of the CK and are

accomplished by setting the appropriate input to an “L” level.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

TC74AC74P

TC74AC74F

Features

•

High speed: f

max

= 200 MHz (typ.) at V

= 5 V

Low power dissipation: I

= 4

μA

(max) at Ta = 25°C

High noise immunity: V

NIH

= V

NIL

= 28% V

(min)

Symmetrical output impedance: |I

| = I

= 24 mA (min)

Capability of driving 50

Ω

transmission lines.

Balanced propagation delays: t

pLH

∼

pHL

−

Wide operating voltage range: V

CC (opr)

= 2 V to 5.5 V

Pin and function compatible with 74F74

TC74AC74FT

•

Weight

DIP14-P-300-2.54

SOP14-P-300-1.27A

TSSOP14-P-0044-0.65A

: 0.96 g (typ.)

: 0.18 g (typ.)

: 0.06 g (typ.)

Start of commercial production

1986-05

2014-03-01

TC74AC74P Related Products

	TC74AC74P	TC74AC74P(F)
Description	IC D-type pos trg dual 14dip	IC,FLIP-FLOP,DUAL,D TYPE,AC-CMOS,DIP,14PIN,PLASTIC
Is it Rohs certified?	conform to	conform to
package instruction	DIP, DIP14,.3	DIP, DIP14,.3
Reach Compliance Code	unknown	unknown
series	AC	AC
JESD-30 code	R-PDIP-T14	R-PDIP-T14
length	19.25 mm	19.25 mm
Load capacitance (CL)	50 pF	50 pF
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP
Maximum Frequency@Nom-Sup	60000000 Hz	60000000 Hz
MaximumI(ol)	0.012 A	0.012 A
Number of digits	1	1
Number of functions	2	2
Number of terminals	14	14
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	DIP
Encapsulate equivalent code	DIP14,.3	DIP14,.3
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3/5 V	3.3/5 V
propagation delay (tpd)	16 ns	16 ns
Certification status	Not Qualified	Not Qualified
Maximum seat height	4.45 mm	4.45 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	2 V	2 V
Nominal supply voltage (Vsup)	3.3 V	5 V
surface mount	NO	NO
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
Trigger type	POSITIVE EDGE	POSITIVE EDGE
width	7.62 mm	7.62 mm
minfmax	100 MHz	100 MHz
Base Number Matches	1	1

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