DEMO MANUAL DC1908A
LTC2338/LTC2337/LTC2336/
LTC2328/LTC2327/LTC2326
18-Bit/16-Bit,1Msps/500ksps/250ksps
True Bipolar Low Power, Single Supply ADCs
DESCRIPTION
The LTC
®
2338/LTC2337/LTC2336/LTC2328/LTC2327/
LTC2326 are true bipolar, low power, low noise ADCs
with serial outputs that can operate from a single 5V
supply. The following text refers to the
LTC2338-18
but
applies to all parts in the family, the only difference being
the maximum sample rates and the number of bits. The
LTC2338-18 supports a ±20.48V fully differential input
range with a 100dB SNR, consumes only 50mW and
achieves ±4LSB INL max with no missing codes at 18
bits. The DC1908A demonstrates the DC and AC perfor-
mance of the LTC2338-18 in conjunction with the DC590
QuikEval™ and DC718 PScope™ data collection boards.
Use the DC590 to demonstrate DC performance such as
peak-to-peak noise and DC linearity. Use the DC718 if
precise sampling rates are required or to demonstrate AC
performance such as SNR, THD, SINAD and SFDR. The
demonstration circuit 1908A is intended to demonstrate
recommended grounding, component placement and
selection, routing and bypassing for this ADC. Suggested
driver circuits for the analog inputs will be presented.
Design files for this circuit board are available at
http://www.linear.com/demo or scan the QR code on
the back of the board.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
QuikEval, PScope are trademarks of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
BOARD PHOTO
-16V
GND
+16V
100MHz
Max
3.3Vpp
AIN+
±10.24V
TO
DC718
AIN-
±10.24V
TO DC590
Figure 1. DC1908A Connection Diagram
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DEMO MANUAL DC1908A
ASSEMBLY OPTIONS
Table 1. DC1908A Assembly Options
ASSEMBLY VERSION
DC1908A-A
DC1908A-B
DC1908A-C
DC1908A-D
DC1908A-E
DC1908A-F
DC1908A-G
DC1908A-H
DC1908A-I
U1 PART NUMBER
LTC2338CMS-18
LTC2337CMS-18
LTC2336CMS-18
LTC2328CMS-18
LTC2327CMS-18
LTC2326CMS-18
LTC2328CMS-16
LTC2327CMS-16
LTC2326CMS-16
MAX CONVERSION RATE
1Msps
500ksps
250ksps
1Msps
500ksps
250ksps
1Msps
500ksps
250ksps
# OF BITS
18
18
18
18
18
18
16
16
16
MAX CLK FREQUENCY
62MHz
31MHz
15.5MHz
62MHz
31MHz
15.5MHz
50MHz
25MHz
12.5MHz
AIN+ RANGE
±10.24V
±10.24V
±10.24V
±10.24V
±10.24V
±10.24V
±10.24V
±10.24V
±10.24V
AIN– RANGE
±10.24V
±10.24V
±10.24V
Grounded Internally
Grounded Internally
Grounded Internally
Grounded Internally
Grounded Internally
Grounded Internally
DC718 QUICK START PROCEDURE
Check to make sure that all switches and jumpers are set
as shown in the connection diagram of Figure 1. The de-
fault connections configure the ADC to use the internal
reference. The analog input is DC coupled. Connect the
DC1908A to a DC718 USB high speed data collection
board using connector P1. Then, connect the DC718 to
a host PC with a standard USB A/B cable. Apply ±16V
to the indicated terminals. Then apply a low jitter signal
source to AIN+ (J4). Connect a low jitter 62MHz 3.3V
P-P
sine wave or square wave to CLK IN (J1). Note that CLK
IN has a 50Ω termination resistor to ground.
Run the PScope software (Pscope.exe version K72 or
later) supplied with the DC718 or download it from www.
linear.com/software.
Complete software documentation is available from the
Help menu. Updates can be downloaded from the Tools
menu. Check for updates periodically as new features
may be added.
The PScope software should recognize the DC1908A and
configure itself automatically.
Click the Collect button (See Figure 4) to begin acquiring
data. The Collect button then changes to Pause, which
can be clicked to stop data acquisition.
DC590 SETUP
IMPORTANT! To avoid damage to the DC1908A or DC590,
make sure that VCCIO (JP6) of the DC590 is set to 3.3V
before connecting the DC590 to the DC1908A.
To use the DC590 with the DC1908A, it is necessary to
apply ±16V and ground to the +16V, –16V and GND ter-
minals or disable amplifier U10 by moving R32 and R35
to R31 and R38 respectively. Disabling U10 will require
that both AIN+ and AIN– (J6) be driven with a low output
impedance signal source. Connect the DC590 to a host PC
with a standard USB A/B cable. Connect the DC1908A to a
DC590 USB serial controller using the supplied 14-conduc-
tor ribbon cable. Apply a signal source to AIN+ or AIN+
and AIN– depending on how the DC1908A is configured.
Run the QuikEval software supplied with the DC590 or
download it from www.linear.com/software. The correct
control panel will be loaded automatically. Click the COL-
LECT button (See Figure 5) to begin reading the ADC.
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DEMO MANUAL DC1908A
DC1908A SETUP
DC Power
The DC1908A requires ±16VDC and draws approximately
100mA from the positive supply. Most of this supply cur-
rent is consumed by the CPLD, op amps, regulators and
discrete logic on the board. The +16VDC input voltage
powers the ADC through LT1763 regulators which pro-
vide protection against accidental reverse bias. Additional
regulators provide power for the CPLD and op amps. See
Figure 1 for connection details.
Clock Source
You must provide a low jitter 3.3V
P-P
sine or square wave
to CLK IN. The clock input is AC coupled so the DC level
of the clock signal is not important. A clock source like
the Rohde & Schwarz SMB100A is recommended. Even
a good generator can start to produce noticeable jitter at
low frequencies. Therefore it is recommended for lower
sample rates to divide down a higher frequency clock to
the desired sample rate. The ratio of clock frequency to
conversion rate is 62:1 for 18-bit parts and 50:1 for 16-
bit parts. If the clock input is to be driven with logic, it is
recommended that the 50Ω terminator (R5) be removed.
Slow rising edges may compromise the SNR of the con-
verter in the presence of high amplitude higher frequency
input signals.
Analog Input
The default setup for the DC1908A requires that only AIN+
is driven. Versions A, B and C of the DC1908A convert the
single-ended signal at AIN+ to a fully-differential signal
that is then fed to the ADC as shown in Figure 2. Single-
ended versions D, E, F, G, H and I simply buffer the signal
applied at AIN+ and feed it to the ADC as shown in Figure 3.
To bypass the single-ended-to-differential converter or
buffer, disable amplifier U10 by moving R32 and R35 to
R31 and R38 respectively. Disabling U10 will require that
both AIN+ and AIN– be driven with a low output imped-
ance signal source.
Data Output
Parallel data output from this board (0V to 3.3V default),
if not connected to the DC718, can be acquired by a logic
analyzer, and subsequently imported into a spreadsheet,
or mathematical package depending on what form of
digital signal processing is desired. Alternatively, the
data can be fed directly into an application circuit. Use
CLKOUT (Pin 3) of P1 to latch the data. The data can be
latched using either edge of this signal. The data output
signal levels at P1 can also be reduced to 0V to 2.5V if
the application circuit cannot tolerate the higher voltage.
This is accomplished by moving the VCCIO jumper (JP3)
to the 2.5V position.
Reference
The default reference is the LTC2338-18 4.096V internal
reference. The LTC6655 5V external reference can be used
by adding R37 and moving the REF jumper (JP2) to the
EXT position. This will increase the input range at AIN+
and AIN– to ±12.5V. Also, an external reference can be
used by removing R37 and applying a reference voltage
to the VREF (E3) terminal with the REF jumper in the EXT
position. If an external reference is used it must settle
quickly in the presence of glitches on the REF pin. The
analog input range for an external reference is ±2.5 • V
REF
.
Figure 2. Single-Ended to Differential Converter
Figure 3. Single-Ended Buffer
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DEMO MANUAL DC1908A
DC1908A SETUP
Data Collection
For SINAD, THD or SNR testing a low noise, low distortion
generator such as the Stanford Research DS360 should
be used. A low jitter RF oscillator such as the Rohde &
Schwarz SMB100A is used as the clock source. This demo
board is tested in house by attempting to duplicate the
FFT plot shown on the front page of the LTC2338-18 data
sheet. This involves using a 62MHz clock source, along
with a sinusoidal generator at a frequency of 2.0kHz. The
input signal level is approximately –1dBFS. A typical FFT
obtained with DC1908A is shown in Figure 4. Note that
to calculate the real SNR, the signal level (F1 amplitude =
–1.030dB) has to be added back to the SNR that PScope
displays. With the example shown in Figure 4 this means
that the actual SNR would be 99.54dB instead of the
98.51dB that PScope displays. Taking the RMS sum of the
recalculated SNR and the THD yields a SINAD of 99.27dB
which is fairly close to the typical number for this ADC.
Figure 4. DC1908A PScope Screen Shot
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DEMO MANUAL DC1908A
DC1908A SETUP
There are a number of scenarios that can produce mis-
leading results when evaluating an ADC. One that is
common is feeding the converter with a frequency, that
is a sub-multiple of the sample rate, and which will only
exercise a small subset of the possible output codes.
The proper method is to pick an M/N frequency for the
input sine wave frequency. N is the number of samples
in the FFT. M is a prime number between one and N/2.
Multiply M/N by the sample rate to obtain the input sine
wave frequency. Another scenario that can yield poor
results is if you do not have a signal generator capable of
ppm frequency accuracy or if it cannot be locked to the
clock frequency. You can use an FFT with windowing to
reduce the “leakage” or spreading of the fundamental, to
get a close approximation of the ADC performance. If an
amplifier or clock source with poor phase noise is used,
the windowing will not improve the SNR.
Layout
As with any high performance ADC, this part is sensitive
to layout. The area immediately surrounding the ADC on
the DC1908A should be used as a guideline for placement,
and routing of the various components associated with
the ADC. Here are some things to remember when lay-
ing out a board for the LTC2338-18. A ground plane is
necessary to obtain maximum performance. Keep bypass
capacitors as close to supply pins as possible. Use indi-
vidual low impedance returns for all bypass capacitors.
Use of a symmetrical layout around the analog inputs will
minimize the effects of parasitic elements. Shield analog
input traces with ground to minimize coupling from other
traces. Keep traces as short as possible.
Component Selection
When driving a low noise, low distortion ADC such as
the LTC2338-18, component selection is important so
as to not degrade performance. Resistors should have
low values to minimize noise and distortion. Metal film
resistors are recommended to reduce distortion caused
by self heating. Because of their low voltage coefficients,
to further reduce distortion NPO or silver mica capacitors
should be used. Any buffer used to drive the LTC2338-18
should have low distortion, low noise and a fast settling
time such as the LT1469.
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