CRD-5376 datasheet, PDF - EEWORLD Datasheet

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CRD-5376: DescriptionAudio modules and development tools ref Bd LP mlt-Ch decimation filter; CategoryModule/solution; File Size5MB，68 Pages; ManufacturerCirrus Logic; Websitehttp://www.cirrus.com

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CRD-5376 Overview

Audio modules and development tools ref Bd LP mlt-Ch decimation filter

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CRD5376

Multichannel Seismic Reference Design

Features

Four Channel Seismic Acquisition Node

– CS3301A geophone amplifiers (2x)

– CS3302A hydrophone amplifiers (2x)

– CS5372A dual

∆Σ

modulators (2x)

– CS5376A quad digital filter (1x)

– CS4373A

∆Σ

test DAC (1x)

– Precision voltage reference

– Clock recovery PLL

General Description

The CRD5376 board is a reference design for the Cirrus

Logic multichannel seismic chip set. Data sheets for the

CS3301A, CS3302A, CS4373A, CS5371A/72A, and

CS5376A devices should be consulted when using the

CRD5376 reference design.

Pin headers connect external differential geophone or

hydrophone sensors to the analog inputs of the mea-

surement channels. An on-board test DAC creates

precision differential analog signals for in-circuit perfor-

mance testing without an external signal source.

The reference design includes an 8051-type microcon-

troller with hardware SPI™ and USB serial interfaces.

The microcontroller communicates with the digital filter

via SPI and with the PC evaluation software via USB.

The PC evaluation software controls register and coeffi-

cient initialization and performs time domain, histogram,

and FFT frequency analysis on captured data.

The CRD5376 features a special breakout connector

used to detach the acquisition and control sections for

remote sensor applications.

ORDERING INFORMATION

CRD5376

Reference Design

On-board Microcontroller

– SPI

™

interface to digital filter

– USB communication with PC

PC Evaluation Software

– Register setup & control

– FFT frequency analysis

– Time domain analysis

– Noise histogram analysis

www.cirrus.com

Cirrus Logic, Inc. 2007

NOV ‘07

DS612RD2

CRD5376

REVISION HISTORY

Revision

RD1

RD2

Date

FEB 2006

NOV 2007

Initial Release.

BOM change to latest revision of silicon. Minor layout enhancements.

Changes

Contacting Cirrus Logic Support

For all product questions and inquiries contact a Cirrus Logic Sales Representative.

To find the one nearest to you go to

www.cirrus.com

IMPORTANT NOTICE

Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is sub-

ject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of

relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and con-

ditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility

is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of

patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied

under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the

information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated

circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes,

or for creating any work for resale.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE

PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANT-

ED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS

OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUS-

TOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES

OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER.

IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER

AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM

ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trade-

marks or service marks of their respective owners.

Windows, Windows 2000, Windows XP, and Windows NT are trademarks or registered trademarks of Microsoft Corporation.

Intel and Pentium are registered trademarks of Intel Corporation.

USBXpress is a registered trademark of Silicon Laboratories, Inc.

SPI is a trademark of Motorola, Inc.

Microwire is a trademark of National Semiconductor Corporation.

C is a registered trademark of Philips Semiconductor.

DS612RD2

CRD5376

TABLE OF CONTENTS

1. INITIAL SETUP ......................................................................................................................... 5

1.1 Kit Contents ....................................................................................................................... 5

1.2 Hardware Setup ................................................................................................................. 5

1.2.1 Default Jumper Settings ........................................................................................ 6

1.3 Software Setup .................................................................................................................. 7

1.3.1 PC Requirements .................................................................................................. 7

1.3.2 Seismic Evaluation Software Installation .............................................................. 7

1.3.3 USBXpress Driver Installation ............................................................................... 7

1.3.4 Launching the Seismic Evaluation Software ......................................................... 8

1.4 Self-Testing CRD5376 ....................................................................................................... 9

1.4.1 Noise Test ............................................................................................................. 9

1.4.2 Distortion Test ..................................................................................................... 10

2. HARDWARE DESCRIPTION ................................................................................................. 11

2.1 Block Diagram ................................................................................................................ 11

2.2 Analog Hardware ............................................................................................................. 12

2.2.1 Analog Inputs ...................................................................................................... 12

2.2.2 Differential Amplifiers .......................................................................................... 16

2.2.3 Delta-Sigma Modulators ..................................................................................... 17

2.2.4 Delta-Sigma Test DAC ........................................................................................ 18

2.2.5 Voltage Reference .............................................................................................. 18

2.3 Digital Hardware .............................................................................................................. 19

2.3.1 Digital Filter ......................................................................................................... 19

2.3.2 Microcontroller .................................................................................................... 22

2.3.3 Phase Locked Loop ............................................................................................ 25

2.3.4 RS-485 Telemetry ............................................................................................... 26

2.3.5 UART Connection ............................................................................................... 28

2.3.6 External Connector ............................................................................................. 28

2.4 Power Supplies ................................................................................................................ 28

2.4.1 Analog Voltage Regulators ................................................................................. 29

2.5 PCB Layout ..................................................................................................................... 29

2.5.1 Layer Stack ......................................................................................................... 29

2.5.2 Differential Pairs .................................................................................................. 30

2.5.3 Bypass Capacitors .............................................................................................. 31

3. SOFTWARE DESCRIPTION .................................................................................................. 32

3.1 Menu Bar ......................................................................................................................... 32

3.2

About

Panel ..................................................................................................................... 33

3.3

Setup

Panel ..................................................................................................................... 34

3.3.1 USB Port ............................................................................................................. 35

3.3.2 Digital Filter ......................................................................................................... 36

3.3.3 Analog Front End ................................................................................................ 37

3.3.4 Test Bit Stream ................................................................................................... 37

3.3.5 Gain/Offset .......................................................................................................... 38

3.3.6 Data Capture ....................................................................................................... 39

3.3.7 External Macros .................................................................................................. 40

3.4

Analysis

Panel ................................................................................................................. 41

3.4.1 Test Select .......................................................................................................... 42

3.4.2 Statistics .............................................................................................................. 43

3.4.3 Plot Enable .......................................................................................................... 43

3.4.4 Cursor ................................................................................................................. 44

3.4.5 Zoom ................................................................................................................... 44

3.4.6 Refresh ............................................................................................................... 44

DS612RD2

CRD5376

3.4.7 Harmonics ........................................................................................................... 44

3.4.8 Spot Noise ........................................................................................................... 44

3.4.9 Plot Error ............................................................................................................. 44

3.5

Control

Panel ................................................................................................................... 45

3.5.1 DF Registers ....................................................................................................... 46

3.5.2 DF Commands .................................................................................................... 46

3.5.3 SPI ...................................................................................................................... 46

3.5.4 Macros ................................................................................................................ 47

3.5.5 GPIO ................................................................................................................... 47

3.5.6 Customize ........................................................................................................... 48

3.5.7 External Macros .................................................................................................. 48

4. BILL OF MATERIALS ........................................................................................................... 49

5. LAYER PLOTS ...................................................................................................................... 51

6. SCHEMATICS ........................................................................................................................ 57

LIST OF FIGURES

Figure 1. CRD5376 Block Diagram ............................................................................................... 11

Figure 2. Differential Pair Routing ................................................................................................. 30

Figure 3. Quad Group Routing ...................................................................................................... 30

Figure 4. Bypass Capacitor Placement ......................................................................................... 31

LIST OF TABLES

Table 1. Amplifier Pin 13 Jumper Settings ...................................................................................... 6

Table 2. SDTKI Input Jumper Settings............................................................................................ 6

Table 3. PLL Clock Input Jumper Settings ...................................................................................... 6

Table 4. Pin Header Input Connections ........................................................................................ 12

Table 5. Analog Switch Settings.................................................................................................... 15

Table 6. Amplifier Pin 13 Jumper Settings .................................................................................... 16

Table 7. SDTKI Input Jumper Settings.......................................................................................... 22

Table 8. Clock Input / Output Jumper Settings.............................................................................. 25

DS612RD2

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