844256CK-24LF datasheet, PDF - EEWORLD Datasheet

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844256CK-24LF: DescriptionClock Generator, 390.625MHz, PQCC32, 5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，16 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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844256CK-24LF Overview

Clock Generator, 390.625MHz, PQCC32, 5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32

844256CK-24LF Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFN
package instruction	5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	S-PQCC-N32
JESD-609 code	e3
length	5 mm
Number of terminals	32
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	390.625 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	VQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	31.25 MHz
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER
Base Number Matches	1

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PRELIMINARY

FEMTOCLOCKS™ CRYSTAL-TO-LVDS

FREQUENCY SYNTHESIZER

ICS844256-24

ENERAL

ESCRIPTION

The ICS844256-24 is a 6 differential output LVDS

Synthesizer designed to generate reference clocks

HiPerClockS™

for SPI-4.2 and XAUI/XGMII 10Gb Ethernet inter-

faces and is a member of the HiPerClocks™family of

high performance clock solutions from IDT. Using a

31.25MHz, 18pF parallel resonant crystal, the following fre-

quencies can be generated based on the settings of frequency

select pins: 390.625MHz, 312.5MHz, 195.3125MHz and

156.25MHz.

EATURES

• Six 3.3V differential LVDS output pairs

• Using a 31.25MHz crystal, the two output banks can be

independently set for 390.625MHz, 312.5MHz, 195.3125MHz

or 156.25MHz

• Crystal oscillator interface

• VCO: 1562.5MHz

• RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz):

0.62ps (typical)

• Full 3.3V supply mode

• 0°C to 70°C ambient operating temperature

• Industrial temperature available upon request

• Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

nXTAL_SEL

XTAL_OUT

REF_CLK

PLL_SEL

XTAL_IN

DDA

The two banks have their own dedicated frequency select pins

and can be independently set for the frequencies mentioned

above. The ICS844256-24, with low phase noise VCO technology,

can achieve 1ps or lower typical rms phase jitter, easily meeting

SPI-4.2 and 10Gb Ethernet jitter requirements. The ICS844256-

24 is packaged in a small 32-pin VFQFN package.

SSIGNMENT

DDO

QA0

nQA0

QA1

nQA1

GND

QB0

nQB0

32 31 30 29 28 27 26 25

DIV_SEL_B1

DIV_SEL_B0

DIV_SEL_A1

DIV_SEL_A0

OEB

OEA

GND

ICS844256-24

32-Lead VFQFN

5mm x 5mm x 0.75mm

package body

K Package

Top View

9 10 11 12 13 14 15 16

DDO

QB1

GND

QB2

nQB1

nQB2

QB3

nQB3

LOCK

IAGRAM

OEA

Pullup

DIV_SELA[0:1]

Pulldown

PLL_SEL

Pullup

REF_CLK

Pulldown

XTAL_IN

Phase

Detector

OSC

VCO

1562.5MHz

÷4

(default)

÷5

÷8

÷16

QA0

nQA0

QA1

nQA1

QB0

XTAL_OUT

nXTAL_SEL

Pulldown

÷4

÷8

÷10

(default)

÷16

Feedback Divider

0 = ÷50

(fixed)

nQB0

QB1

nQB1

QB2

nQB2

QB3

nQB3

Pulldown

DIV_SELB[0:1]

Pulldown:Pullup

OEB

Pullup

The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization

and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.

IDT

™

/ ICS

™

LVDS FREQUENCY SYNTHESIZER

ICS844256CK-24 REV. A MARCH 28, 2007

844256CK-24LF Related Products

	844256CK-24LF	ICS844256CK-24LF	844256CK-24LFT	ICS844256CK-24LFT	ICS844256CK-24T	ICS844256CK-24
Description	Clock Generator, 390.625MHz, PQCC32, 5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32	Clock Generator, 390.625MHz, PQCC32, 5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32	Clock Generator, 390.625MHz, PQCC32, 5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32	Clock Generator, 390.625MHz, PQCC32, 5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32	Clock Generator, 390.625MHz, PQCC32, 5 X 5 MM, 0.75 MM HEIGHT, MO-220VHHD-2, VFQFN-32	Clock Generator, 390.625MHz, PQCC32, 5 X 5 MM, 0.75 MM HEIGHT, MO-220VHHD-2, VFQFN-32
Is it Rohs certified?	conform to	conform to	conform to	conform to	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QFN	QFN	QFN	QFN	QFN	QFN
package instruction	5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32	HVQCCN,	5 X 5 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32	HVQCCN,	HVQCCN,	HVQCCN,
Contacts	32	32	32	32	32	32
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
JESD-30 code	S-PQCC-N32	S-PQCC-N32	S-PQCC-N32	S-PQCC-N32	S-PQCC-N32	S-PQCC-N32
JESD-609 code	e3	e3	e3	e3	e0	e0
length	5 mm	5 mm	5 mm	5 mm	5 mm	5 mm
Number of terminals	32	32	32	32	32	32
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Maximum output clock frequency	390.625 MHz	390.625 MHz	390.625 MHz	390.625 MHz	390.625 MHz	390.625 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VQCCN	HVQCCN	VQCCN	HVQCCN	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260	260	260	225	225
Master clock/crystal nominal frequency	31.25 MHz	31.25 MHz	31.25 MHz	31.25 MHz	31.25 MHz	31.25 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm
Maximum supply voltage	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V
Minimum supply voltage	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn)	Matte Tin (Sn)	Matte Tin (Sn)	Matte Tin (Sn)	TIN LEAD	TIN LEAD
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	30	30	30	30	30	30
width	5 mm	5 mm	5 mm	5 mm	5 mm	5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Base Number Matches	1	1	1	1	-	-
Is it lead-free?	-	Lead free	-	Lead free	Contains lead	Contains lead

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