EEWORLDEEWORLDEEWORLD

Part Number

Search

KNS050-205TG

Description
IC Socket, DIP50, 50 Contact(s),
CategoryThe connector    socket   
File Size229KB,3 Pages
ManufacturerAdvanced Interconnections Corp.
Download Datasheet Parametric View All

KNS050-205TG Overview

IC Socket, DIP50, 50 Contact(s),

KNS050-205TG Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerAdvanced Interconnections Corp.
Reach Compliance Codecompliant
ECCN codeEAR99
Contact to complete cooperationGOLD OVER NICKEL
Contact completed and terminatedTin/Lead (Sn/Pb) - with Nickel (Ni) barrier
Contact materialBERYLLIUM COPPER
Device slot typeIC SOCKET
Type of equipment usedDIP50
JESD-609 codee0
Number of contacts50
Base Number Matches1
Board to Board
Connectors
.050/(1.27mm) Pitch Board to Board Connectors
Molded and Peel-A-Way Insulators
Table of Models
Single Row
Dual Row
Triple Row
®
Description:
Peel-A-Way
®
(KBS, KNS, KTS)
Material: Polyimide Film
Index: -269°C to 400°C (-452°F to 752°F)
Female
KBS
KNS
KTS
FSDS
RDDS
(RDD*)
Description:
FR-4 (FSDS)
Mat’l: FR-4 Fiberglass Epoxy Board
Index: -40°C to 140°C (-40°F to 284°F)
Description:
Molded (RDDS, RDD)
Mat’l: High Temp. Liquid Crystal Polymer (LCP)
Index: -40°C to 260°C (-40°F to 500°F)
Description:
Peel-A-Way
®
(KBA, KNA, KDA,
KTA)
Material: Polyimide Film
Index: -269°C to 400°C (-452°F to 752°F)
• Male and female connectors are
designed in mating pairs.
• .050/(1.27mm) row to row pitch.
• High reliability screw-machined
terminals with closed-end
construction for 100% anti-
wicking of solder.
• For surface mount options,
consult factory.
• Reliable mechanical support.
• Custom configurations available.
Male
Features:
* RDD and KDA have .100/(2.54mm) pitch between rows.
Note: FSDS replaces SDS, HSDS, and RSDS.
RDDS replaces DDS and HDDS.
RDD replaces DD.
KBA
KNA
(KDA*)
KTA
How To Order
Female
Body Type
RoHS Compliant Insulators:
KTS 090 - 227 M G
Contact Plating
RoHS Compliant:
®
KBS - Single Row Peel-A-Way
FSDS** - Single Row FR-4
KNS - Dual Row Peel-A-Way
®
RDDS - Dual Row Molded
RDD*- Dual Row Molded
KTS - Triple Row Peel-A-Way
®
* .100/(2.54) pitch between rows
**FSDS is available with
Gold plating only (GG)
G - Gold
T - Tin/Lead
Terminal Plating
RoHS Compliant:
G - Gold
M - Matte Tin
T - Tin/Lead
Terminal Type
See options
Total Number of Pins
(no. of pins per row x no. of rows)
Std. pins per row = 10, 20, 30, 40 & 50
Male
Body Type
RoHS Compliant Insulators:
KTA 090 - 131 M
KBA - Single Row Peel-A-Way
®
KNA - Dual Row Peel-A-Way
®
KDA*- Dual Row Peel-A-Way
®
KTA - Triple Row Peel-A-Way
®
* .100/(2.54) pitch between rows
Terminal Plating
RoHS Compliant:
G - Gold
M - Matte Tin
T - Tin/Lead
Total Number of Pins
(no. of pins per row x no. of rows)
Std. pins per row = 10, 20, 30, 40 & 50
Terminal Type
See options
5 Energy Way, West Warwick, RI 02893 USA
Tel: 800.424.9850 | 401.823.5200
Fax: 401.823.8723
info@advanced.com | www.advanced.com
Catalog 16 Rev. Aug 09
Note: Terminals plated with Matte Tin are available only with Gold plated contacts.
Quick-Turn delivery is not available on products with Matte Tin plating.
Products shown covered by patents issued and/or pending. Specifications subject to change without notice.
inch/(mm)
EEWORLD University ----PI new product: LinkSwitch-TNZ
PI 新品:LinkSwitch-TNZ:https://training.eeworld.com.cn/course/27365...
hi5 Power technology
Problems encountered when debugging ez430-RF2500 demo program with IAR 5.3.0
I am a complete novice, hope you can teach me! :) After clicking the download and debug button, this problem appears Tue Sep 06, 2011 15:41:06: Fatal error: The Object file contains features not supor...
yyjhappy Microcontroller MCU
Has anyone tried hand soldering TI C6000?
Here I will share with you a guide to manual soldering of BGA packaged chipsThe manual soldering method provided here is an improved version of my original method. Now I can basically guarantee a 100%...
maylove DSP and ARM Processors
How to solve parameterized assignment in Verilog: assign all 0s, assign all 1s, assign all Zs, assign all xs
How to solve the parameterized assignment in Verilog: assign all 0s, assign all 1s, assign all Zs, assign all xs 3 ^, Q6 T: x( H* H6 C www.fpga-design.net7 O2 v2 {0 c0 M6 | Assign all 0s: means all bi...
eeleader FPGA/CPLD
Does anyone have a Jlink or other ARM emulator that is gathering dust? Please support me.
Does anyone have a Jlink or other ARM emulator that is gathering dust? Please support me. Please contact me at 1021352522....
1021352522 Buy&Sell
Can't see the fat file system in the CF card under WinCE5.0?
I compiled NK.bin with wince5.0 BSP of AMD LX800, and found that I can't see the CF card after entering Wince. Please help me, and I will give you high points. 1. When I start nk.bin with a 3.5-inch l...
mcuwing Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2069  2150  1340  1561  2530  42  44  27  32  51 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号