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FM24C64LVN

Description
EEPROM, 8KX8, Serial, CMOS, PDIP8, PLASTIC, DIP-8
Categorystorage    storage   
File Size97KB,13 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric View All

FM24C64LVN Overview

EEPROM, 8KX8, Serial, CMOS, PDIP8, PLASTIC, DIP-8

FM24C64LVN Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeDIP
package instructionPLASTIC, DIP-8
Contacts8
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum clock frequency (fCLK)0.1 MHz
Data retention time - minimum40
Durability100000 Write/Erase Cycles
I2C control byte1010DDDR
JESD-30 codeR-PDIP-T8
JESD-609 codee0
length9.817 mm
memory density65536 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count8192 words
character code8000
Operating modeSYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
organize8KX8
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP8,.3
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialSERIAL
power supply3/5 V
Certification statusNot Qualified
Maximum seat height5.08 mm
Serial bus typeI2C
Maximum standby current0.00001 A
Maximum slew rate0.001 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
Maximum write cycle time (tWC)6 ms
write protectHARDWARE
Base Number Matches1
FM24C64 – 64K-Bit Standard 2-Wire Bus Interface Serial EEPROM
December 2001
FM24C64 – 64K-Bit Standard 2-Wire Bus
Interface Serial EEPROM
General Description
FM24C64 is a 64Kbit CMOS non-volatile serial EEPROM orga-
nized as 8K x 8 bit memory. This device confirms to Extended IIC
2-wire protocol that allows accessing of memory in excess of
16Kbit on an IIC bus. This serial communication protocol uses a
Clock signal (SCL) and a Data signal (SDA) to synchronously
clock data between a master (e.g. a microcontroller) and a slave
(EEPROM). FM24C64 is designed to minimize pin count and
simplify PC board layout requirements.
FM24C64 offers hardware write protection where by the entire
memory array can be write protected by connecting WP pin to V
CC
.
This section of memory then becomes unalterable until the WP pin
is switched to V
SS
.
“LZ” and “L” versions of FM24C64 offer very low standby current
making them suitable for low power applications. This device is
offered in SO, TSSOP and DIP packages.
Fairchild EEPROMs are designed and tested for applications
requiring high endurance, high reliability and low power consump-
tion.
Features
I
Extended operating voltage: 2.5V to 5.5V
I
Up to 400 KHz clock frequency at 2.5V to 5.5V
I
Low power consumption
— 0.5mA active current typical
— 10µA standby current typical
— 1µA standby current typical (L version)
— 0.1µA standby current typical (LZ version)
I
Schmitt trigger inputs
I
32 byte page write mode
I
Self timed write cycle (6ms typical)
I
Hardware Write Protection for the entire array
I
Endurance: up to 100K data changes
I
Data Retention: Greater than 40 years
I
Packages: 8-Pin DIP, 8-Pin SO and 8-Pin TSSOP
I
Temperature range
— Commercial: 0°C to +70°C
— Industrial (E): -40°C to +85°C
— Automotive (V): -40°C to +125°C
Block Diagram
VSS
VCC
WP
SDA
START
STOP
LOGIC
CONTROL
LOGIC
SLAVE ADDRESS
REGISTER &
COMPARATOR
E2PROM
ARRAY
WRITE
LOCKOUT
H.V. GENERATION
TIMING &CONTROL
SCL
XDEC
A2
A1
A0
WORD
ADDRESS
COUNTER
R/W
YDEC
CK
DIN
DATA REGISTER
DOUT
© 2001 Fairchild Semiconductor Corporation
FM24C64 Rev. C
1
www.fairchildsemi.com
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