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74LVC2G32DP,125

Description
logic gates 3.3V dual 2-input OR
Categorylogic    logic   
File Size278KB,21 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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74LVC2G32DP,125 Overview

logic gates 3.3V dual 2-input OR

74LVC2G32DP,125 Parametric

Parameter NameAttribute value
Brand NameNXP Semiconductor
Is it Rohs certified?conform to
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP8,.16
Contacts8
Manufacturer packaging codeSOT505-2
Reach Compliance Codecompliant
seriesLVC/LCX/Z
JESD-30 codeS-PDSO-G8
JESD-609 codee4
length3 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeOR GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions2
Number of entries2
Number of terminals8
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP8,.16
Package shapeSQUARE
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup5.3 ns
propagation delay (tpd)11 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3 mm
Base Number Matches1
74LVC2G32
Dual 2-input OR gate
Rev. 11 — 8 April 2013
Product data sheet
1. General description
The 74LVC2G32 provides a 2-input OR gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs in the Power-down mode
High noise immunity
24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C

74LVC2G32DP,125 Related Products

74LVC2G32DP,125 74LVC2G32GF,115 74LVC2G32GT,115 74LVC2G32GM,125 74LVC2G32DC,125
Description logic gates 3.3V dual 2-input OR logic gates dual 2-input OR gate logic gates 3.3V dual 2-input OR logic gates 3.3V dual 2-input OR logic gates dual 2-input OR gate
Brand Name NXP Semiconductor NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconductor
Is it Rohs certified? conform to conform to conform to conform to conform to
Parts packaging code TSSOP SON SON QFN SSOP
package instruction TSSOP, TSSOP8,.16 1.35 X 1 MM, 0.50 MM HEIGHT, MO-252, SOT-1089, SON-8 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-833-1, SON-8 0.95 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-833-1, SON-8 2.30 MM, PLASTIC, MO-187, SOT-765-1, VSSOP-8
Contacts 8 8 8 8 8
Manufacturer packaging code SOT505-2 SOT1089 SOT833-1 SOT902-2 SOT765-1
Reach Compliance Code compliant compli compli compli compliant
series LVC/LCX/Z - LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code S-PDSO-G8 - R-PDSO-N8 R-PDSO-N8 R-PDSO-G8
JESD-609 code e4 - e3 e4 e4
length 3 mm - 1.95 mm 1.95 mm 2.3 mm
Load capacitance (CL) 50 pF - 50 pF 50 pF 50 pF
Logic integrated circuit type OR GATE - OR GATE OR GATE OR GATE
MaximumI(ol) 0.024 A - 0.024 A 0.024 A 0.024 A
Humidity sensitivity level 1 - 1 1 1
Number of functions 2 - 2 2 2
Number of entries 2 - 2 2 2
Number of terminals 8 - 8 8 8
Maximum operating temperature 125 °C - 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C - -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP - VSON VSON VSSOP
Encapsulate equivalent code TSSOP8,.16 - SOLCC8,.04,20 LCC8,.06SQ,20 TSSOP8,.12,20
Package shape SQUARE - RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH - SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
method of packing TAPE AND REEL - TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 - 260 260 260
power supply 3.3 V - 3.3 V 3.3 V 3.3 V
propagation delay (tpd) 11 ns - 11 ns 11 ns 11 ns
Certification status Not Qualified - Not Qualified Not Qualified Not Qualified
Schmitt trigger NO - NO NO NO
Maximum seat height 1.1 mm - 0.5 mm 0.5 mm 1 mm
Maximum supply voltage (Vsup) 5.5 V - 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 1.65 V - 1.65 V 1.65 V 1.65 V
Nominal supply voltage (Vsup) 1.8 V - 1.8 V 1.8 V 1.8 V
surface mount YES - YES YES YES
technology CMOS - CMOS CMOS CMOS
Temperature level AUTOMOTIVE - AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) - Tin (Sn) NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
Terminal form GULL WING - NO LEAD NO LEAD GULL WING
Terminal pitch 0.65 mm - 0.5 mm 0.5 mm 0.5 mm
Terminal location DUAL - DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 - 30 30 30
width 3 mm - 1 mm 0.95 mm 2 mm
Base Number Matches 1 - 1 1 1
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