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DM74LS299

Description
8-Input Universal Shift/Storage Register with
File Size59KB,6 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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DM74LS299 Overview

8-Input Universal Shift/Storage Register with

DM74LS299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins
October 1988
Revised March 2000
DM74LS299
8-Input Universal Shift/Storage Register with
Common Parallel I/O Pins
General Description
The DM74LS299 is an 8-bit universal shift/storage register
with 3-STATE outputs. Four modes of operation are possi-
ble: hold (store), shift left, shift right and load data. The par-
allel load inputs and flip-flop outputs are multiplexed to
reduce the total number of package pins. Separate outputs
are provided for flip-flops Q0 and Q7 to allow easy cascad-
ing. A separate active LOW Master Reset is used to reset
the register.
Features
s
Common I/O for reduced pin count
s
Four operation modes: shift left, shift right, load and
store
s
Separate shift right serial input and shift left serial input
for easy cascading
s
3-STATE outputs for bus oriented applications
Ordering Code:
Order Number
DM74LS299WM
DM74LS299N
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
V
CC
=
Pin 20
GND
=
Pin 10
Pin Descriptions
Pin
Names
CP
D
S0
D
S7
S0, S1
MR
Description
Clock Pulse Input (Active Rising Edge)
Serial Data Input for Right Shift
Serial Data Input for Left Shift
Mode Select Inputs
Asynchronous Master Reset Input (Active LOW)
OE1, OE2 3-STATE Output Enable Inputs (Active LOW)
I/O0–I/O7 Parallel Data Inputs or 3-STATE Parallel Outputs
Q0–Q7
Serial Outputs
© 2000 Fairchild Semiconductor Corporation
DS009827
www.fairchildsemi.com

DM74LS299 Related Products

DM74LS299 DM74LS299WM DM74LS299N
Description 8-Input Universal Shift/Storage Register with 8-Input Universal Shift/Storage Register with 8-Input Universal Shift/Storage Register with
Is it Rohs certified? - incompatible incompatible
Maker - Fairchild Fairchild
Parts packaging code - SOIC DIP
package instruction - SOP, SOP20,.4 0.300 INCH, PLASTIC, MS-001, DIP-20
Contacts - 20 20
Reach Compliance Code - unknow unknow
Other features - HOLD MODE; COMMON I/O PINS; GATED OUTPUT CONTROL HOLD MODE; COMMON I/O PINS; GATED OUTPUT CONTROL
Counting direction - BIDIRECTIONAL BIDIRECTIONAL
series - LS LS
JESD-30 code - R-PDSO-G20 R-PDIP-T20
JESD-609 code - e0 e0
length - 12.8 mm 26.075 mm
Logic integrated circuit type - PARALLEL IN PARALLEL OUT PARALLEL IN PARALLEL OUT
Maximum Frequency@Nom-Su - 35000000 Hz 35000000 Hz
Number of digits - 8 8
Number of functions - 1 1
Number of terminals - 20 20
Maximum operating temperature - 70 °C 70 °C
Output characteristics - 3-STATE 3-STATE
Output polarity - TRUE TRUE
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - SOP DIP
Encapsulate equivalent code - SOP20,.4 DIP20,.3
Package shape - RECTANGULAR RECTANGULAR
Package form - SMALL OUTLINE IN-LINE
Peak Reflow Temperature (Celsius) - NOT SPECIFIED NOT SPECIFIED
power supply - 5 V 5 V
propagation delay (tpd) - 35 ns 35 ns
Certification status - Not Qualified Not Qualified
Maximum seat height - 2.65 mm 5.08 mm
Maximum supply voltage (Vsup) - 5.25 V 5.25 V
Minimum supply voltage (Vsup) - 4.75 V 4.75 V
Nominal supply voltage (Vsup) - 5 V 5 V
surface mount - YES NO
technology - TTL TTL
Temperature level - COMMERCIAL COMMERCIAL
Terminal surface - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form - GULL WING THROUGH-HOLE
Terminal pitch - 1.27 mm 2.54 mm
Terminal location - DUAL DUAL
Maximum time at peak reflow temperature - NOT SPECIFIED NOT SPECIFIED
Trigger type - POSITIVE EDGE POSITIVE EDGE
width - 7.5 mm 7.62 mm
minfmax - 35 MHz 35 MHz
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