Data Sheet
AS2578 /B
Austria Mikro Systeme International
®
TELEPHONE CONTROLLER WITH
13 MEMORIES AND 2-WIRE BUS
General Description
The AS2578 /B are a versatile repertory LD/MF diallers
with a melody generator, a ring frequency discriminator
and a 2-wire interface to EEPROM. Together with the
AS2520/1, the AS2578 /B form a coherent basis for a
fully electronic telephone with a wide range of options.
The AS2578 /B are especially designed to adapt to
different PTT specifications. A RAM is on chip for last
number redial, 3 direct dial and 10 numbers with
abbreviated dialling. To allow easy use under a PABX,
the device incorporates automatic pause insertion and
sliding cursor procedure as selectable options (AS2578)
or centrex keys (AS2578B). The device can be used with
or without EEPROM as appropriate. When an EEPROM
is connected, all RAM content is stored in the EEPROM
by power loss.
The circuit provides the possibility to set different modes
of operation (LM codes) via the keyboard or via pin
options, e.g. default signalling mode, automatic pause
insertion, flash or ground loop and settings of volume
and melodies.
Key Features
u
u
u
u
u
u
Low operating voltage
Low current consumption, standby
≤
0.1
µA
Oscillator using Xtal or ceramic resonator (3.58 MHz)
Serial interface to external EEPROM
Consistent, simple and usable procedures
The settings are programmed via the keyboard and
stored in EEPROM or set by pin options
Dialler:
Data protection with 20 digit FIFO
Sliding cursor protocol with comparison
Automatic pause generation
Temporary MF select via keyboard
30 digit LNR (Last Number Redial)
13 x 20 digit memory (RAM) on chip
Tone Ringer:
Ring frequency discrimination
3 tone melody with 4 different repetition rates
Volume of melodies can be set in 4 steps
u
u
u
u
u
u
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Package
Available in 28 pin DIP and PLCC.
Block Diagramme
Vss V
DD
(AS2578B)
1
4
7
*
2
5
8
0
3
6
9
#
MUTE
SET
LNR
M1
M2
M3
MEM
A
HS
B
C
D
MODE
KEYSCAN
POR
HOOK
STATE
CE
R
3.58 MHz
OSCILLATOR
CONTROL
AP (AS2578 only)
MV
RR
DP
MASK
GL
MUTE
DIAL
REDIAL
DTMF
MELODY
MF
MO
SCL
SERIAL
INTERFACE
SDA
13 X 20
1 X 30
RAM
FIFO
RING
FREQUENCY
DETECTOR
FCI
AS2578 /B
Rev. 3
1
March 1997
Data Sheet
Pin Description
Pin #
1
2
3
4
5
Symbol
C4
C3
C2
C1
HS
Function
Keyboard Columns
AS2578 /B
Hook Switch Input
This input is active high with internal pull-down resistor.
Signalling (LD/MF) Default Mode Select Input
Mode pin
High
Open
Low
Function
LD default mode, make/break pulse 33/66 ms
MF only
LD default mode, make/break pulse 40/60 ms
6
MODE
7
CE
Chip Enable Input
This input is active high with internal pull-down resistor and is used to initiate setup
procedures.
Oscillator Input
Oscillator Output
Oscillator pins for Xtal or ceramic resonator (3.58 MHz). When a ceramic resonator is used
a capacitor (10 - 22 pF) must be connected from each of the oscillator pins to V
SS
.
Negative Power Supply
DTMF Tone Output
The dual tones provided at this output have a level independent of the supply voltage in
the operating range from 2.5 to 5.5V.
Serial Data I/O
SDA is a bidirectional pin with an open drain with internal pull-up resistor and is used to
transfer data into and out of a compatible EEPROM.
Serial Clock Line Output
The SCL output is an open drain with internal pull-up resistor and is used to clock data into
and out of a compatible EEPROM.
Frequency Comparator Input
Schmitt trigger input for ring frequency discrimination.
Melody Generator Output
Melodies for tone ringing are generated on this output. The output signal is PDM.
Mute Output
This push-pull output is high during dialling and when mute key has been activated,
otherwise low.
Mask Output
This push-pull output is high during pulsing (make and break periods).
8
9
OSC2
OSC1
10
11
Vss
TONE
13
SDA
14
SCL
15
FCI
12
MO
16
MUTE
17
MASK
Continues…
Rev. 3
2
March 1997
Data Sheet
Pin Description cont´d
Pin #
18
Symbol
DPN
Function
AS2578 /B
Dial Pulse Output
This is the push-pull output for controlling the hook-switch transistor. It is low during on-
hook and break periods and high during off-hook (see timing diagrammes).
Ground Loop Output
This push-pull output is high during ground loop
Positive Power Supply
Keyboard Rows
19
GL
20
21
22
23
24
25
V
DD
R4
R3
R2
R1
C5
Keyboard Column (AS2578)
This column is for the memory keys
Keyboard Column (AS2578B)
This column is for centrex keys (A - D keys). Automatic pause insertion and Temporary
MF select 1 are fixed enabled (AP open)
Access Pause Select Input (AS2578)
This input is used to select the automatic access pause insertion or sliding cursor (no
centrex keys):
AP pin
High
Open
Low
Function
Sliding cursor enabled
Automatic pause insertion enabled
Sliding cursor and pause disabled
Temporary MF select 2
Temporary MF select 1
Temporary MF select 1
C6
26
AP
C5
Keyboard Column (AS2578B)
This column is for the memory keys
Melody Volume Select Input
This input is used to select the volume of the melodies in 4 steps by connecting the MV
pin to row 1, 2, or 3. Leaving the pin open is the default setting (max. volume).
Repetition Rate Select Input
This input is used to select the repetition rate of the melodies. 4 different rates can be
selected by either leaving the pin open (default) or connecting it to column 1, 2, or 3.
27
MV
28
RR
Note: "Open" means
≥
100 kΩ.
Power On Reset
The on chip power on reset circuit monitors the supply
voltage (V
DD
). As long as V
DD
remains below the internal
reference voltage, Vref (typically 1.1V), the oscillator is
inhibited. When V
DD
rises above Vref (t
RISE
= 1
µs/V
to 50
ms/V), a reset signal is generated to assure correct start-
up.
Initial Setup
A low to high transition on the CE input will initiate an
automatic setup, i.e. the pin options are scanned and
(when an EEPROM is connected) the stored LM codes
and melody settings are read from the EEPROM. This is
done independently of the hook state (see timing
diagrammes).
Rev. 3
3
March 1997
Data Sheet
Valid Keys
The keyscanning is enabled when CE or HS are high.
During setup the keyboard is disabled. A valid key is
detected from the keyboard by connecting the appropriate
row to the column. This can be done using an n x m
keyboard matrix with single contacts. Positive and
negative edges of each contact are debounced. The
debounce time is 15 ms.
AS2578 /B
Furthermore, the mode can be selected by setting the
LM code (see setup menu). If no LM code is set, the
mode will be determined by the MODE pin.
When default LD mode is selected, a temporary change
to MF mode can be invoked by pressing * (AP = high,
AS2578 only) or Set, * , Set.
When the circuit is in temporary MF mode, each of the
following procedures revert it to default LD mode:
Mute Key
The mute key is only enabled when off-hook. Depressing
the mute key activates and deactivates (toggle switch)
the MUTE output, when internal mute is inactive, i.e. in
speech mode.
Any key entry overwrites a mute activated by the mute
key, and mute will be deactivated.
- pressing Set, * , Set ,
- pressing recall key (by further entries of the recall key
the signalling mode will toggle between MF and LD,
- by next On-hook.
Last Number Redial
Centrex Keys (AS2578B only)
The alphameric keys accommodate easy use of centrex
services. The A, B, C and D keys are only valid in MF
mode and are not storable. Pressing one of these keys
will invoke the appropriate MF tones to be transmitted.
The centrex keys are not stored in the RAM, but are
buffered in the FIFO, and subsequently entered digits
are also buffered in the FIFO.
Pressing the recall key after a sequence including centrex
keys will reset the RAM counter, and subsequently
entered digits will be stored in the RAM. If MF select (Set,
* , Set) has been invoked once, then all susequently
digits/data will be buffered in the FIFO.
LNR is a facility that allows resignalling of the last
manually dialled number without keying in all the digits
again. The LNR is repeatable.
The current contents of the RAM are overwritten by new
entries.
A manually entered number is automatically stored in the
LNR RAM. The capacity of the RAM is 30 digits. If a
number greater than 30 digits is entered, the LNR facility
will be inhibited (until new entries < 31 digits) and further
entries will be buffered in FIFO.
Postdialled digits, i.e. digits manually entered after LNR
has been invoked, are not stored in RAM but buffered in
FIFO.
Memory Keys
The keys M1 to M3 are direct memory access keys and
the MEM key is used for abbreviated dialling.
13 numbers can be stored in on chip RAM. Each number
can contain up to 20 digits (including pauses).
If an EEPROM is connected to the serial bus, the content
of the RAM is written into the EEPROM when CE is
turned low indicating a power loss.
During programming multible pauses can be inserted by
pressing the LNR key.
Memory dialling is cascadable.
Recall Function
A recall activation will invoke a flash (timed loop break)
or a ground loop (GL) depending on the selected LM
code, which is stored in the external EEPROM (see
setup menu).
If no LM code is set, depressing the recall key will invoke
both a flash and a GL, however, in LD mode a Flash is
never executed.
If recall is the first entry in a digit string, it will be stored
in LNR RAM when digit(s) are entered after the recall.
If the recall key is depressed after a digit string has been
entered or dialled out, the recall will not be stored, and
subsequently entered digits will be stored in the LNR
RAM as the new number.
If pressing the recall key is not followed by digit entries,
the LNR RAM remains intact.
Mode Selection
The default mode (LD or MF) can be selected by the
MODE pin.
Rev. 3
4
March 1997
Data Sheet
After a recall a pause will automatically be generated.
The pause time is 3 sec.
The ground loop (GL) has two pulse lengths, namely a
short of 500 ms and a long of 1250 ms.
Short GL: If the recall key is depressed for
≤
540 ms, the
GL pulse is 500 ms.
Long GL: If the recall key is depressed for > 540 ms, the
GL pulse is 1250 ms.
During redial a ground loop is only executed as a long GL
(1250 ms).
AS2578 /B
protocol. The protocol defines any device that sends
data onto the bus as a transmitter, and the receiving
device as the receiver. The AS2578 /B are controlling the
transfer and hence the master. The EEPROM being
controlled is the slave.
The AS2578 /B will always initiate data transfer, and
provide the clock for both transmit and receive operations.
Therefore, the protocol is for single master applications
only.
However, a temporary second master can be used to
write into the EEPROM when the AS2578 /B are supplied
and in idle state.
Clock and Data Conventions
Data states on the SDA line can change only during SCL
low. SDA state changes during SCL high are reserved
for indicating start and stop conditions (see figure 1 and
2).
Start Condition
All commands are preceded by the start condition, which
is a high to low transition of SDA when SCL is high. The
slave should continuously monitor the SDA and SCL
lines for the start condition and must not respond to any
command until this condition has been met.
Stop Condition
All communications are terminated by a stop condition,
which is low to high transition of SDA when SCL is high.
The stop condition is also used to place the slave in the
standby power mode.
Acknowledge
Acknowledge is a software convention used to indicate
successful data transfers. The transmitting device, either
master or slave, will release the bus after transmitting
eight bits. During the ninth clock cycle the receiver will
pull the SDA line low to acknowledge that it received the
eight bits of data (see figure 3).
The slave should always respond with an acknowledge
after recognition of a start condition and its slave address.
If both the device and a write operation have been
selected, the slave should respond with an acknowledge
after receipt of each subsequent eight bit word.
In the read mode, when the EEPROM has transmitted
eight bits of data, it should release the SDA line and
monitor the line for an acknowledge. If the AS2578 /B
respond with an acknowledge and does not generate a
stop condition, the EEPROM should continue to transmit
data. If the AS2578 /B do not respond with an
acknowledge, the EEPROM should terminate further
Pause Generation
Pause introduces a delay in signalling digit strings to
accommodate second and subsequent dial tones.
Automatic pauses are generated in the following manner:
- always after a recall independent of the AP pin
- with automatic pause insertion enabled by pin option
or LM code, up to two pauses can be automatically
inserted at any location of the original entry in the RAM
(except location 1 of the digit string), when the mute
output goes inactive (in MF mode for more than 1 sec.)
before next entry.
A pause read from the RAM can be terminated (shortened)
prior to time out by a low level on AP pin (AS2578 only)
during the pause execution. The pause time is 3 sec.
During execution of a pause, mute is inactive, i.e. the
circuit is in speech mode.
Sliding Cursor Procedure (AS2578 only)
To accommodate redialling (LNR) behind a PABX without
using automatic pause generation, a sliding cursor
protocol is implemented. The sliding cursor is enabled
when AP = high. If new entries match the previous RAM
contents, pressing the LNR key will dial out the remaining
digits.
If there is an error in matching, the LNR will be inhibited
until next on-hook, and the RAM will contain the new
number.
Serial Interface
The AS2578 /B support a bidirectional bus oriented
Rev. 3
5
March 1997
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