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LMUN2133LT1

Description
bias resistor transistors
CategoryDiscrete semiconductor    The transistor   
File Size225KB,8 Pages
ManufacturerLRC
Websitehttp://www.lrc.cn
Download Datasheet Parametric Compare View All

LMUN2133LT1 Overview

bias resistor transistors

LMUN2133LT1 Parametric

Parameter NameAttribute value
MakerLRC
package instruction,
Reach Compliance Codeunknown
Maximum collector current (IC)0.1 A
Minimum DC current gain (hFE)80
Number of components1
Polarity/channel typePNP
Maximum power dissipation(Abs)0.4 W
surface mountYES
Transistor component materialsSILICON
LESHAN RADIO COMPANY, LTD.
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SOT-23
package which is designed for low power surface mount applications.
LMUN2111LT1
SERIES
3
1
2
SOT-23
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SOT-23 package can be soldered using wave or reflow. The
modified gull-winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
Available in 8 mm embossed tape and reel. Use the Device Number
to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the
Device Number to order the 13 inch/10,000 unit reel.
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
PIN 1
BASE
(INPUT)
R
1
PIN 3
COLLECTOR
(OUTPUT)
R
2
PIN 2
EMITTER
(GROUND)
MARKINGDIAGRAM
A6x M
A6x = Device Marking
x
M
= A – L(See Page 2)
= Date Code
DEVICE MARKING
INFORMATION
See specific marking information in
the device marking table on page 2 of this
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance –
Junction-to-Ambient
Thermal Resistance –
Junction-to-Lead
Junction and Storage
Temperature Range
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
Symbol
P
D
Max
246 (Note 1.)
400 (Note 2.)
1.5 (Note 1.)
2.0 (Note 2.)
508 (Note 1.)
311 (Note 2.)
174 (Note 1.)
208 (Note 2.)
–55 to +150
Unit
mW
°C/W
°C/W
°C/W
°C
data sheet.
R
θJA
R
θJL
T
J
, T
stg
LMUN2111-1/8

LMUN2133LT1 Related Products

LMUN2133LT1 LMUN2131LT3 LMUN2134LT1 LMUN2130LT3 LMUN2130LT1 LMUN2132LT3 LMUN2132LT1 LMUN2131LT1 LMUN2134LT3 LMUN2133LT3
Description bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors
Maker LRC LRC LRC LRC LRC LRC LRC LRC LRC LRC
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknown unknown unknown
Maximum collector current (IC) 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A
Minimum DC current gain (hFE) 80 8 80 3 3 15 15 8 80 80
Number of components 1 1 1 1 1 1 1 1 1 1
Polarity/channel type PNP PNP PNP PNP PNP PNP PNP PNP PNP PNP
Maximum power dissipation(Abs) 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W
surface mount YES YES YES YES YES YES YES YES YES YES
Transistor component materials SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON
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