EEWORLDEEWORLDEEWORLD

Part Number

Search

LMUN2131LT3

Description
bias resistor transistors
CategoryDiscrete semiconductor    The transistor   
File Size225KB,8 Pages
ManufacturerLRC
Websitehttp://www.lrc.cn
Download Datasheet Parametric Compare View All

LMUN2131LT3 Overview

bias resistor transistors

LMUN2131LT3 Parametric

Parameter NameAttribute value
MakerLRC
package instruction,
Reach Compliance Codeunknown
Maximum collector current (IC)0.1 A
Minimum DC current gain (hFE)8
Number of components1
Polarity/channel typePNP
Maximum power dissipation(Abs)0.4 W
surface mountYES
Transistor component materialsSILICON
LESHAN RADIO COMPANY, LTD.
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SOT-23
package which is designed for low power surface mount applications.
LMUN2111LT1
SERIES
3
1
2
SOT-23
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SOT-23 package can be soldered using wave or reflow. The
modified gull-winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
Available in 8 mm embossed tape and reel. Use the Device Number
to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the
Device Number to order the 13 inch/10,000 unit reel.
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
PIN 1
BASE
(INPUT)
R
1
PIN 3
COLLECTOR
(OUTPUT)
R
2
PIN 2
EMITTER
(GROUND)
MARKINGDIAGRAM
A6x M
A6x = Device Marking
x
M
= A – L(See Page 2)
= Date Code
DEVICE MARKING
INFORMATION
See specific marking information in
the device marking table on page 2 of this
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance –
Junction-to-Ambient
Thermal Resistance –
Junction-to-Lead
Junction and Storage
Temperature Range
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
Symbol
P
D
Max
246 (Note 1.)
400 (Note 2.)
1.5 (Note 1.)
2.0 (Note 2.)
508 (Note 1.)
311 (Note 2.)
174 (Note 1.)
208 (Note 2.)
–55 to +150
Unit
mW
°C/W
°C/W
°C/W
°C
data sheet.
R
θJA
R
θJL
T
J
, T
stg
LMUN2111-1/8

LMUN2131LT3 Related Products

LMUN2131LT3 LMUN2134LT1 LMUN2130LT3 LMUN2130LT1 LMUN2132LT3 LMUN2132LT1 LMUN2131LT1 LMUN2134LT3 LMUN2133LT1 LMUN2133LT3
Description bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors bias resistor transistors
Maker LRC LRC LRC LRC LRC LRC LRC LRC LRC LRC
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknown unknown unknown
Maximum collector current (IC) 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A
Minimum DC current gain (hFE) 8 80 3 3 15 15 8 80 80 80
Number of components 1 1 1 1 1 1 1 1 1 1
Polarity/channel type PNP PNP PNP PNP PNP PNP PNP PNP PNP PNP
Maximum power dissipation(Abs) 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W 0.4 W
surface mount YES YES YES YES YES YES YES YES YES YES
Transistor component materials SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON
Qsys custom component base is empty
After qsys customized components, base is empty [img]C:\Users\Administrator\Desktop\jpg\QQ图片20150430140210.jpg[/img] [img]C:\Users\Administrator\Desktop\jpg\QQ图片20150430140205.png[/img] [img]C:\Users\...
free_think FPGA/CPLD
[Atria Development Board AT32F421 Review] - TEST02 Initial FFT Test Results
[i=s]This post was last edited by Gen_X on 2021-4-26 19:52[/i]After many tests: Arteli AT32F421 supports its own CFFT-F32 operation. The function is located in: \AT32F421\Artery AT32 MCU Pack_20210324...
Gen_X Domestic Chip Exchange
About MAX232 Experts please come in
First of all, the company produces instruments. The signal processing part of the instrument is controlled by a single-chip microcomputer, and then the data is sent to the computer through MAX232. The...
wy3168 MCU
Beginner's Answers to Questions about 430 Clocks
As a beginner, I was really confused by the three clocks of 430 at first, but after consulting the manual and listening to the teachings of experts, I finally understood it. I would like to talk about...
418417996 Microcontroller MCU
There are no errors in the compilation, but no sys file is generated
: A former colleague's program output file name was set to XXX.sys. The compilation passed but XXX.sys was not generated. The information is as follows: Deleting intermediate files and output files fo...
zhangchuang Embedded System
Different line width rules are set in Altium Designer10. Why are the line widths the same after routing?
Different line width rules are set in Altium Designer10. Why are the line widths the same after routing?...
hu柏拉图的永恒 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2382  182  931  1791  2884  48  4  19  37  59 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号