TECHNICAL DATA
IW4027B
Dual JK Flip-Flop
The IW4027B is a Dual JK Flip-Flop which is edge-triggered and
features independent Set, Reset, and Clock inputs. Data is accepted when
the Clock is LOW and transferred to the output on the positive-going edge
of the Clock. The active HIGH asynchronous Reset and Set are
independent and override the J, K, or Clock inputs. The outputs are
buffered for best system performance.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
μA
at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4027BN
Plastic
IW4027BD SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Set Reset Clock
L
H
H
L
L
L
PIN 16 =V
CC
PIN 8 = GND
L
H
L
H
L
L
L
L
X
X
X
J
X
X
X
L
H
L
H
K
X
X
X
L
L
H
H
Outputs
Q
n+1
L
H
H
H
L
Qn
Q
n+1
H
L
H
L
H
Qn
No change
X = don’t care
Qn+1 = State After Clock Positive Transition
Rev. 00
IW4027B
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
I
IN
P
D
P
tot
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP, SOIC
Package
Power Dissipation per Output Transistor
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +20
-0.5 to V
CC
+0.5
±10
500**
100
-65 to +150
260
Unit
V
V
mA
mW
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
**Derating: - Plastic DIP from -55 to +100°C
- SOIC Package from -55 to +65°C
- Plastic DIP: - 10 mW/°C from +100 to +125°C
- SOIC Package: : - 7 mW/°C from +65 to +125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
T
A
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
3.0
0
-55
Max
18
V
CC
+125
Unit
V
V
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
should be constrained to the range
high-impedance circuit. For proper operation V
IN
GND≤V
IN
≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
Rev. 00
IW4027B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High-Level
Input Voltage
Maximum Low -
Level Input Voltage
Minimum High-Level
Output Voltage
Test Conditions
V
OUT
=0.5 V or V
CC
- 0.5 V
V
OUT
=1.0 V or V
CC
- 1.0 V
V
OUT
=1.5 V or V
CC
- 1.5 V
V
OUT
=0.5 V or V
CC
- 0.5 V
V
OUT
=1.0 V or V
CC
- 1.0 V
V
OUT
=1.5 V or V
CC
- 1.5 V
V
IN
=GND or V
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
Guaranteed Limit
≥-55°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
4.5
9.0
13.5
0.05
0.05
0.05
0.5
1.0
1.5
±0.1
1.0
2.0
4.0
20
0.64
1.6
4.2
-0.64
–2.0
–1.6
–4.2
25°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
4.5
9.0
13.5
0.05
0.05
0.05
0.5
1.0
1.5
±0.1
1.0
2.0
4.0
20
0.51
1.3
3.4
-0.51
–1.6
–1.3
–3.4
≤125
°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
4.5
9.0
13.5
0.05
0.05
0.05
0.5
1.0
1.5
±1.0
30
60
120
600
0.36
0.9
2.4
mA
-0.36
–1.15
–0.9
–2.4
Unit
V
V
IL
V
V
OH
V
V
IL
=1.5V, V
IH
=3.5V, I
O
=-1µA
V
IL
=3.0V, V
IH
=7.0V, I
O
=-1µA
V
IL
=4.0V, V
IH
=11V, I
O
=-1µA
V
OL
Maximum Low-Level
Output Voltage
V
IN
=GND or V
CC
V
V
IL
=1.5V, V
IH
=3.5V, I
O
=1µA
V
IL
=3.0V, V
IH
=7.0V, I
O
=1µA
V
IL
=4.0V, V
IH
=11V, I
O
=1µA
I
IN
I
CC
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
(per Package)
Minimum Output
Low (Sink) Current
V
IN
= GND or V
CC
V
IN
= GND or V
CC
μA
μA
I
OL
V
IN
= GND or V
CC
V
OL
=0.4 V
V
OL
=0.5 V
V
OL
=1.5 V
mA
I
OH
Minimum Output
V
IN
= GND or V
CC
High (Source) Current V
OH
=4.6 V
V
OH
=2.5 V
V
OH
=9.5 V
V
OH
=13.5 V
Rev. 00
IW4027B
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF, R
L
=200 kΩ, Input t
r
=t
f
=20 ns)
V
CC
Symbol
f
max
Parameter
Maximum Clock Frequency
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
-
3.5
8
12
300
130
90
300
130
90
400
170
120
200
100
80
Guaranteed Limit
≥-55°C
25°C
3.5
8
12
300
130
90
300
130
90
400
170
120
200
100
80
7.5
≤125°C
1.75
4
6
600
260
180
600
260
180
800
340
240
400
200
160
Unit
MHz
t
PLH
, t
PHL
Maximum Propagation Delay, Clock to Q or Q
ns
t
PLH
Maximum Propagation Delay, Set to Q or Reset
to Q
Maximum Propagation Delay, Set to Q or Reset
to Q
Maximum Output Transition Time, Any Output
ns
t
PHL
ns
t
TLH
, t
THL
ns
C
IN
Maximum Input Capacitance
pF
TIMING REQUIREMENTS
(C
L
=50pF, R
L
=200 kΩ, Input t
r
=t
f
=20 ns)
V
CC
Symbol
t
w
Parameter
Minimum Pulse Width, Clock
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
140
60
40
180
80
50
200
75
50
45
5
2
Guaranteed Limit
≥-55°C
25°C
140
60
40
180
80
50
200
75
50
45
5
2
≤125°C
280
120
80
360
160
100
400
150
100
90
10
4
Unit
ns
t
w
Minimum Pulse Width, Set or Reset
ns
t
su
Minimum Data Setup Time
ns
t
r
, t
f
Maximum Input Rise or Fall Time, Clock
μs
Rev. 00
IW4027B
V
CC
K(J)
0.5
t
SU
0.9
0.9
0.5
0.1
0V
V
CC
CLOCK
0.5
0.1
t
LH
t
W
t
HL
0V
V
OHCC
Q(Q)
0.5V
CC
V
OL
t
REM
t
PHL
(t
PLH
)
V
CC
SET
(RESET)
0.5
0V
V
CC
Âûõîä nQ(nQ)
SET
(RESET)
0V
V
CC
RESET
(SET)
0.5
t
W2
0.9
Q(Q)
0.5V
CC
0.1
t
THL
(t
TLH
)
t
PHL
(t
PLH
)
Figure 1. Switching Waveforms
0V
V
OHCC
U
DD
U
OL
0V
Rev. 00
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