• Guaranteed low skew < 150pS (max.) between any two
outputs
• Very low duty cycle distortion < 300pS
• High speed: propagation delay < 3nS
• Very low CMOS power levels
• TTL compatible inputs and outputs
• 1:10 fanout
• Maximum output rise and fall time < 1.25nS (max.)
• Low input capacitance: 3pF (typ)
• 2.5V Supply Voltage
• Available in SSOP and QSOP Packages
ASM2P20807A
Product Description
The ASM2P20807A is a 2.5V compatible, high speed, low
noise, 1:10 fanout, non-inverting clock buffer. The large
fanout from a single input reduces loading on the preceding
driver and provides an efficient clock distribution network.
Providing output to output skew as low as 150pS, the
ASM20807A is an ideal clock distribution device for
synchronous systems. Multiple power and grounds reduce
noise. Typical applications are clock and signal distribution.
Block Diagram
O
1
O
2
O
3
O
4
O
5
IN
O
6
O
7
O
8
O
9
O
10
Alliance Semiconductor
2575, Augustine Drive
•
Santa Clara, CA
•
Tel: 408.855.4900
•
Fax: 408.855.4999
•
www.alsc.com
Notice: The information in this document is subject to change without notice.
June 2005
rev 0.2
Pin Configuration
IN
GND
O
1
V
CC
O
2
GND
O
3
V
CC
O
4
GND
1
2
3
4
5
6
7
8
9
10
SSOP/ QSOP PACKAGE
TOP VIEW
20
V
CC
O
10
O
9
GND
O
8
V
CC
O
7
GND
0
6
O
5
ASM2P20807A
A
S
M
2
P
2
0
8
0
7
A
19
18
17
16
15
14
13
12
11
Pin Description
Pin #
1
3,5,7,9,11,12,14,16,18,19
2,6,10,13,17
4,8,15,20
Pin Names
IN
O
1
-O
10
GND
V
CC
Description
Clock Input
Clock Outputs
Ground
Power supply
Capacitance
(TA = +25°C, f = 1.0MHz)
Symbol
C
IN
Parameter
1
Input Capacitance
Conditions
V
IN
= 0V
Typ
3
Max
4
Unit
pF
NOTE:1. This parameter is measured at characterization but not tested.
Absolute Maximum Ratings
1
Symbol
V
TERM2
V
TERM3
V
TERM4
TSTG
IOUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
-0.5 to +4.6
-0.5 to +5.5
-0.5 to V
CC
+0.5
-65 to +150
-60 to +60
Unit
V
V
V
°C
mA
NOTES:
1. These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
2. V
CC
terminals.
3. Input terminals.
4. Outputs and I/O terminals.
2.5V CMOS 1-TO-10 CLOCK DRIVER
Notice: The information in this document is subject to change without notice.
2 of 11
June 2005
rev 0.2
Power Supply Characteristics
Symbol
I
CCL
I
CCH
∆I
CC
ASM2P20807A
Parameter
Quiescent
Power
Supply Current TTL
Inputs HIGH
Power Supply Current
per Input HIGH
Dynamic Power Supply
Current per Output
3
Total Power
Current
4
Supply
Test Conditions
1
V
CC
= Max
V
IN
= GND or V
CC
V
CC
= Max
V
IN
= V
CC
-0.6V
V
CC
= 2.7V and 15 pF load
150 MHz
V
CC
= Max.
C
L
= 12pF
All outputs toggling
fi = 150MHz
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
–0.6V
V
IN
= GND
Min
-
Typ
2
0.1
Max
20
Unit
µA
-
45
300
µA
I
CCD
-
40
-
µA
/MHz
I
C
-
65
90
mA
-
75
100
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 2.5V, +25°C ambient.
3. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
4. I
C
= IQUIESCENT + IINPUTS + IDYNAMIC
I
C
= I
CC
+
∆I
CC
DHNT + I
CCD
(fi)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= V
CC
-0.6V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at DH
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fi = Input Frequency
2.5V CMOS 1-TO-10 CLOCK DRIVER
Notice: The information in this document is subject to change without notice.
3 of 11
June 2005
rev 0.2
DC Electrical Characteristics Over Operating Range
Following Conditions Apply Unless Otherwise Specified
Industrial: T
A
= -40°C to +85°C, V
CC
= 2.5V ± 0.2V
ASM2P20807A
Symbol
V
IH
V
IL
I
IH
I
IL
V
IK
I
ODH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH
(Input pins)
Input
LOW
(Input pins)
Current
Current
Test Conditions
1
Min
1.7
-
Typ
2
-
-
-
-
-0.7
-45
Max
-
0.7
±1
±1
-1
-100
Unit
V
V
mA
mA
V
mA
V
CC
= Max, V
I
= V
CC
V
CC
= Max, V
I
= GND
V
CC
= Min, I
IN
= -18mA
V
CC
= 2.5V, V
IN
= V
IH
or V
IL
V
O
= 1.25V
3
V
CC
= 2.5V, V
IN
= V
IH
or V
IL
V
O
= 1.25V
3
V
CC
= Min V
IN
= V
IH
or V
IL
I
OH
= -1mA
I
OH
= -8mA
-
-
-
-25
Clamp Diode Voltage
Output HIGH Current
I
ODL
Output LOW Current
Output HIGH Voltage
20
V
CC
–0.2
1.8
-
-
-25
5
55
-
-
-
-
-60
120
-
-
0.4
0.6
-135
mA
V
OH
V
OL
V
Output LOW Voltage
V
CC
= Min
V
IN
= V
IH
or V
IL
V
CC
= Max., V
O
= GND
3
I
OL
= 1mA
I
OL
= 8mA
V
mA
I
OS
Short Circuit Current
4
NOTES:
1. For conditions shown as Max or Min, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 2.5V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= Vcc - 0.6V at rated current.
2.5V CMOS 1-TO-10 CLOCK DRIVER
Notice: The information in this document is subject to change without notice.
4 of 11
June 2005
rev 0.2
Switching Characteristics Over Operating Range
1,2
Following Conditions Apply Unless Otherwise Specified
Industrial: T
A
= -40°C to +85°C, V
CC
= 2.5V ± 0.2V
ASM2P20807A
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(PP)
Parameter
Propagation Delay
Conditions
3
C
L
= 22pF
100 MHz
Min
-
-
-
-
-
-
Typ
3
1
1
100
250
400
Max
3.5
1.25
1.25
150
300
600
Unit
nS
nS
nS
pS
pS
pS
Output Rise Time
Output Fall Time
Same Device Output Pin-to-Pin Skew
4
Pulse Skew
5
Part-to-Part Skew
6
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(PP)
Parameter
Propagation Delay
Conditions
3,7
C
L
= 12pF
150 MHz
Min
-
-
-
-
-
-
Typ
2.4
1
1
100
250
400
Max
2.7
1.2
1.2
150
300
600
Unit
nS
nS
nS
pS
pS
pS
Output Rise Time
Output Fall Time
Same Device Output Pin-to-Pin Skew
4
Pulse Skew
5
Part-to-Part Skew
6
NOTES:
1. t
PLH
and t
PHL
are production tested. All other parameters guaranteed but not production tested.
2. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do
not imply skew.
3. See test circuits and waveforms.
4. Skew measured between all outputs under identical transitions and load conditions.
5. Skew measured is difference between propagation delay times t
PHL
and t
PLH
of same output under identical load conditions.
6. Part to part skew for all outputs given identical transitions and load conditions at identical VCC levels and temperature.
7. Airflow of 1m/s is recommended for frequencies above 133MHz
.
2.5V CMOS 1-TO-10 CLOCK DRIVER
Notice: The information in this document is subject to change without notice.
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