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PN4119

Description
N-channel jfet general purpose amplifier
CategoryDiscrete semiconductor    The transistor   
File Size22KB,1 Pages
ManufacturerCalogic
Websitehttp://www.calogic.net/
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PN4119 Overview

N-channel jfet general purpose amplifier

PN4119 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCalogic
Parts packaging codeTO-92
package instructionPLASTIC PACKAGE-3
Contacts3
Reach Compliance Codecompliant
ConfigurationSINGLE
FET technologyJUNCTION
Maximum feedback capacitance (Crss)1.5 pF
JEDEC-95 codeTO-92
JESD-30 codeO-PBCY-T3
JESD-609 codee0
Number of components1
Number of terminals3
Operating modeDEPLETION MODE
Maximum operating temperature135 °C
Package body materialPLASTIC/EPOXY
Package shapeROUND
Package formCYLINDRICAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Certification statusNot Qualified
surface mountNO
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsAMPLIFIER
Transistor component materialsSILICON
N-Channel JFET
General Purpose Amplifier
CORPORATION
2N4117 – 2N4119 / 2N4117A – 2N4119A
PN4117 – PN4119 / PN4117A – PN4119A / SST4117 – SST4119
PIN CONFIGURATION
FEATURES
Leakage
Low Capacitance
Low
TO - 92
TO-72
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25
o
C unless otherwise noted)
Gate-Source or Gate-Drain Voltage . . . . . . . . . . . . . . . . -40V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Storage Temperature Range . . . . . . . . . . . . . -65
o
C to +200
o
C
Operating Temperature Range . . . . . . . . . . . -55
o
C to +175
o
C
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300
o
C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW
Derate above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . 2.0mW/
o
C
NOTE:
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
G
D
C
S
G
D S
SOT-23
G
5007
D
S
PRODUCT MARKING (SOT-23)
SST4117
SST4118
SST4119
T17
T18
T19
ORDERING INFORMATION
Part
Package
Temperature Range
-55
o
C to +175
o
C
-55
o
C to +135
o
C
-55
o
C to +135
o
C
-55
o
C to +175
o
C
2N4117-19/A Hermetic TO-72
PN4117-19/A Plastic TO-92
SST4117-19 Plastic SOT-23
X2N4117-19/A Sorted Chips in Carriers
ELECTRICAL CHARACTERISTICS
(T
A
= 25
o
C unless otherwise specified)
SYMBOL
BV
GSS
PARAMETER
Gate-Source Breakdown Voltage
Gate Reverse Current
I
GSS
A devices
A devices
V
GS(off)
I
DSS
g
fs
g
fs
g
os
C
iss
C
rss
Gate-Source Pinch-Off Voltage
Drain Current at Zero Gate Voltage (Note 1)
Common-Source Forward Transconductance (Note 1)
Common-Source Forward Transconductance (Note 2)
Common-Source Output Conductance
Common-Source Input Capacitance (Note 2)
Common-Source Reverse Transfer Capacitance (Note 2)
-0.6
70
60
3
3
1.5
4117/A
-40
-10
-1
-25
-2.5
-1.8
210
-1
80
70
5
3
1.5
4118/A
-40
-10
-1
-25
-2.5
-3
250
-2
100
90
10
3
pF
1.5
4119/A
-40
-10
-1
-25
-2.5
-6
330
µS
MIN MAX MIN MAX MIN MAX
UNITS
V
pA
nA
V
mA
TEST CONDITIONS
I
G
= -1µA, V
DS
= 0
V
GS
= -20V, V
DS
= 0
T
A
= +150
o
C
V
DS
= 10V, I
D
= 1nA
V
DS
= 10V, V
GS
= 0
V
DS
= 10V, f = 1kHz
V
GS
= 0, f = 30MHz
V
DS
= 10V, V
GS
= 0, f = 1kHz
V
DS
= 10V, V
GS
= 0,
f = 1MHz
V
DS
= 10V, V
GS
= 0,
f = 1MHz
0.02 0.09 0.08 0.24 0.20 0.60
NOTES: 1.
Pulse test: Pulse duration of 2ms used during test.
2.
For design reference only, not 100% tested.

PN4119 Related Products

PN4119 PN4119A PN4118 PN4117 PN4117A PN4118A SST4117A SST4118A SST4119A
Description N-channel jfet general purpose amplifier N-channel jfet general purpose amplifier N-channel jfet general purpose amplifier N-channel jfet general purpose amplifier N-channel jfet general purpose amplifier N-channel jfet general purpose amplifier Transistor, Transistor, Transistor,
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Maker Calogic Calogic Calogic Calogic Calogic Calogic Calogic Calogic Calogic
Reach Compliance Code compliant compliant compliant compliant compliant compliant unknown unknown unknown
FET technology JUNCTION JUNCTION JUNCTION JUNCTION JUNCTION JUNCTION JUNCTION JUNCTION JUNCTION
Maximum operating temperature 135 °C 135 °C 135 °C 135 °C 135 °C 135 °C 135 °C 135 °C 135 °C
Polarity/channel type N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL
surface mount NO NO NO NO NO NO YES YES YES
Is it lead-free? Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead - - -
Parts packaging code TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 - - -
package instruction PLASTIC PACKAGE-3 CYLINDRICAL, O-PBCY-T3 PLASTIC PACKAGE-3 CYLINDRICAL, O-PBCY-T3 PLASTIC PACKAGE-3 PLASTIC PACKAGE-3 - , ,
Contacts 3 3 3 3 3 3 - - -
Configuration SINGLE SINGLE SINGLE SINGLE SINGLE SINGLE - - -
Maximum feedback capacitance (Crss) 1.5 pF 1.5 pF 1.5 pF 1.5 pF 1.5 pF 1.5 pF - - -
JEDEC-95 code TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 - - -
JESD-30 code O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 - - -
JESD-609 code e0 - e0 e0 e0 - e0 e0 e0
Number of components 1 1 1 1 1 1 - - -
Number of terminals 3 3 3 3 3 3 - - -
Operating mode DEPLETION MODE DEPLETION MODE DEPLETION MODE DEPLETION MODE DEPLETION MODE DEPLETION MODE - - -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - - -
Package shape ROUND ROUND ROUND ROUND ROUND ROUND - - -
Package form CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL - - -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - - -
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified - - -
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE - - -
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM - - -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - - -
transistor applications AMPLIFIER AMPLIFIER AMPLIFIER AMPLIFIER AMPLIFIER AMPLIFIER - - -
Transistor component materials SILICON SILICON SILICON SILICON SILICON SILICON - - -
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