TMC2111AR3C datasheet, PDF - EEWORLD Datasheet

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TMC2111AR3C: Descriptionvariable-length shift register; CategoryThe embedded processor and controller Microcontrollers and processors; File Size68KB，12 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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TMC2111AR3C Overview

variable-length shift register

TMC2111AR3C Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	QLCC
package instruction	QCCJ,
Contacts	28
Reach Compliance Code	compliant
ECCN code	3A991.A.2
boundary scan	NO
maximum clock frequency	30 MHz
External data bus width	8
JESD-30 code	S-PQCC-J28
JESD-609 code	e0
length	11.505 mm
low power mode	NO
Number of terminals	28
Maximum operating temperature	70 °C
Minimum operating temperature
Output data bus width	8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.505 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, PIPELINE REGISTER
Base Number Matches	1

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www.fairchildsemi.com

TMC2011A/2111A

Variable-Length Shift Register

Features

• Low power CMOS

• TMC2011A is a pin compatible replacement for the

TDC1011 and TMC2011

• TMC2211A is a pin compatible replacement for the

TMC2111

• Inputs and outputs are TTL compatible

• DC–40MHz clock rate

• Selectable delay lengths (TMC2011A: 3 to 18 stages,

TMC2111A: 1 to 16 stages)

• Special 4-bit wide mixed-delay mode (TMC2011A)

• Available in 24-pin CERDIP and plastic DIP and 28-lead

Plastic Leadless Chip Carrier

Applications

•

Video filtering

High speed data registers

Local storage registers

Digital delay lines

Television special effects

Pipeline register

Description

The TMC2011A and TMC2111A are high-speed, byte-wide

shift registers with programmable delay lengths.

The TMC2011A can be programmed to any length between

3 and 18 stages. It offers a special split-word mode which

allows for mixed delay lengths. The TMC2011A, con-

structed in low-power CMOS, is pin and function compatible

with the bipolar TDC1011.

The TMC2111A is a byte-wide shift register that can be pro-

grammed to lengths of 1 to 16 stages.

The TMC2011A and TMC2111A are fully synchronous,

with all operations controlled by a single master clock. Input

and output registers are positive-edge triggered D-type ﬂip-

ﬂops. The length and mode controls are also registered. Both

devices operate with a maximum clock rate of 40 MHz.

Fabricated in a submicron CMOS process, the TMC2011A

and TMC2111A are TTL-compatible, and are available in

24-pin CERDIP and Plastic DIP packages as well as a

28-lead Plastic Leadless Chip Carrier.

Block Diagrams

TMC2011A

3-0

4-Bit Wide

1 of 16 Selector

4-Bit Wide

1 of 16 Selector

3-0

8-Bit Wide

1 of 16 Selector

TMC2111A

7-0

CLK

7-4

CLK

65-2011A-02

7-4

65-2011A-01

Rev. 1.1.0

TMC2111AR3C Related Products

	TMC2111AR3C	TMC2111AR3C1	TMC2111AN2C1	TMC2111AN2C	TMC2011AR3C1	TMC2011AR3C	TMC2011AN2C1	TMC2011AN2C
Description	variable-length shift register	variable-length shift register	variable-length shift register	variable-length shift register	Pipeline Register, 8-Bit, CMOS, PQCC28, PLASTIC, LCC-28	variable-length shift register	variable-length shift register	variable-length shift register
Is it Rohs certified?	incompatible	-	incompatible	incompatible	incompatible	incompatible	incompatible	-
Parts packaging code	QLCC	-	DIP	DIP	-	QLCC	DIP	-
package instruction	QCCJ,	-	DIP,	DIP,	PLASTIC, LCC-28	PLASTIC, LCC-28	DIP,	-
Contacts	28	-	24	24	-	28	24	-
Reach Compliance Code	compliant	-	compliant	compliant	compliant	compliant	compliant	-
ECCN code	3A991.A.2	-	3A991.A.2	3A991.A.2	-	3A991.A.2	3A991.A.2	-
boundary scan	NO	-	NO	NO	NO	NO	NO	-
maximum clock frequency	30 MHz	-	40 MHz	30 MHz	40 MHz	30 MHz	40 MHz	-
External data bus width	8	-	8	8	8	8	8	-
JESD-30 code	S-PQCC-J28	-	R-PDIP-T24	R-PDIP-T24	S-PQCC-J28	S-PQCC-J28	R-PDIP-T24	-
JESD-609 code	e0	-	e0	e0	e0	e0	e0	-
length	11.505 mm	-	30.485 mm	30.485 mm	11.505 mm	11.505 mm	30.485 mm	-
low power mode	NO	-	NO	NO	NO	NO	NO	-
Number of terminals	28	-	24	24	28	28	24	-
Maximum operating temperature	70 °C	-	70 °C	70 °C	70 °C	70 °C	70 °C	-
Output data bus width	8	-	8	8	8	8	8	-
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	QCCJ	-	DIP	DIP	QCCJ	QCCJ	DIP	-
Package shape	SQUARE	-	RECTANGULAR	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR	-
Package form	CHIP CARRIER	-	IN-LINE	IN-LINE	CHIP CARRIER	CHIP CARRIER	IN-LINE	-
Certification status	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	-
Maximum seat height	4.57 mm	-	5.33 mm	5.33 mm	4.57 mm	4.57 mm	5.33 mm	-
Maximum supply voltage	5.25 V	-	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	-
Minimum supply voltage	4.75 V	-	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	-
Nominal supply voltage	5 V	-	5 V	5 V	5 V	5 V	5 V	-
surface mount	YES	-	NO	NO	YES	YES	NO	-
technology	CMOS	-	CMOS	CMOS	CMOS	CMOS	CMOS	-
Temperature level	COMMERCIAL	-	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	-
Terminal surface	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	TIN LEAD	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-
Terminal form	J BEND	-	THROUGH-HOLE	THROUGH-HOLE	J BEND	J BEND	THROUGH-HOLE	-
Terminal pitch	1.27 mm	-	2.54 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm	-
Terminal location	QUAD	-	DUAL	DUAL	QUAD	QUAD	DUAL	-
width	11.505 mm	-	7.62 mm	7.62 mm	11.505 mm	11.505 mm	7.62 mm	-
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, PIPELINE REGISTER	-	DSP PERIPHERAL, PIPELINE REGISTER	DSP PERIPHERAL, PIPELINE REGISTER	DSP PERIPHERAL, PIPELINE REGISTER	DSP PERIPHERAL, PIPELINE REGISTER	DSP PERIPHERAL, PIPELINE REGISTER	-
Base Number Matches	1	-	1	1	-	1	1	-

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