DG0040 Discrete Replica

The DG0040 is a domestically produced 4-bit single-chip CPU launched in 1983. It was jointly developed by Beijing Factory 878, Hefei Transistor Factory, and Shaoyang Radio Factory, with Factory 878 responsible for layout and manufacturing.
The DG0040 integrates 11,000 transistors, uses a 6µm N-channel E/D MOS process, and most instructions are single-cycle, with an instruction cycle of 10µs/20µs (single and double-cycle instructions).
It belongs to the complex instruction set, with a relatively complex microinstruction structure for single instructions, but high efficiency. Its memory structure conforms to the basic characteristics of the Harvard architecture.
Its external interface is simple and easy to use, equipped with a dedicated matching chip, the DG0041 (mainly responsible for clock generation and reset, digital tube decoding, and serial-to-parallel conversion and output).
 
For information regarding the original CPU and the replica CPU, please refer to the following: (This mainly focuses on the open-source project files; detailed explanations are omitted.)
   https://www.bilibili.com/read/cv26817005/
 
This design primarily consists of a 74LS chip, a small number of GAL16V8 chips, and a small number of XC9572s. All the logic of DG0040 and DG0041 is placed on a single circuit board, ensuring full compatibility with the original DG0040 and DG0041 instructions. It does not support the DG0046 instruction in double-byte sequences, nor does it support connecting to DG0046.
 
The internal code and netlist files of the GAL chip and XC9572 will be released upon the final completion of this project.
 
Some physical photos are shown below: