The circuit shown in Figure 1 is a 16-bit, ultra-stable, low-noise, precision, bipolar, ±10 V voltage source requiring only a minimum number of precision external components.
The AD5760 voltage output DAC (Grade B) has a maximum integral nonlinearity (INL) of ±0.5 LSB and a maximum differential nonlinearity (DNL) of ±0.5 LSB.
The complete system has less than 0.1 LSB peak-to-peak noise and drift, measured at 100-second intervals. This circuit is suitable for use in medical instrumentation, test and measurement, and industrial control applications requiring precision low-drift voltage sources.
The circuit shown in Figure 1 is based on the AD5760 true 16-bit, unbuffered voltage output DAC operating from bipolar supplies up to 33 V. The positive reference voltage input range of the AD5760 is 5 V to VDD − 2.5 V, and the negative reference voltage input range is VSS + 2.5 V to 0 V. The maximum relative accuracy is ±0.5 LSB, ensuring operating monotonicity and differential nonlinearity (DNL). Maximum value is ±0.5 LSB. The AD5760 output noise is 8 nV/√Hz and has extremely high long-term linear error stability (0.00625 LSB).
Figure 1 shows the AD5760 configured in unity gain mode with amplifier input bias current compensation, producing a symmetrical bipolar output voltage range. This mode of operation uses an external output op amp and on-chip resistors (see the AD5760 data sheet) to provide input bias current compensation. These internal resistors are thermally matched to each other and to the DAC ladder, allowing ratiometric thermal tracking.
The AD8675 precision op amp has low offset voltage (75 μV maximum) and low noise (typ. 2.8 nV/√Hz, 0.1 μV pp, 0.1 Hz to 10 Hz), making it an optimal output buffer for the AD5760. The AD5760 has two internally matched 6.8 kΩ feedforward and feedback resistors that can either be connected to the AD8675 op amp to provide a 10 V offset voltage, thereby enabling a ±10 V output swing, or they can be connected in parallel to provide bias current cancellation. . This example shows a ±10 V bipolar output with resistors used for the bias current cancellation function. The internal resistor connection is controlled by setting the relevant bits in the AD5760 control register (see AD5760 data sheet).
The ADR4550 is a high-precision voltage reference that provides excellent temperature stability (2 ppm/°C maximum, Grade B) and ultra-low output voltage noise (2.8 μV pp, 0.1 Hz to 10 Hz). These characteristics make it an ideal reference voltage source for the AD5760.
To obtain a ±10 V output voltage range, the ADR4550's +5 V reference voltage is amplified to ±10 V using the AD8675 and AD8676 (dual AD8675) (shown in Figure 1).
The output buffer also uses the AD8675, which has low noise and low drift characteristics. This amplifier works with the AD8676, a dual-channel version of the AD8675, to amplify the low-noise ADR4550's +5 V reference to +10 V and -10 V, respectively. R1, R2, R3, and R4 in this gain circuit are precision metal sheet resistors with tolerance and temperature coefficient resistors of 0.01% and 0.6 ppm/°C respectively. R6 and C4 form a low-pass filter with a cutoff frequency of approximately 10 Hz. This filter is used to attenuate reference noise.
If desired, a single dual-channel amplifier AD8676 can be used in place of the two AD8675 op amps in the circuit. However, the EVAL-AD5760SDZ board is designed to provide output stage flexibility, so two AD8675 op amps were chosen for this example.
The circuit's digital inputs are serial inputs and are compatible with standard SPI, QSPI, MICROWIRE® and DSP interface standards.
Linearity measurement
The precision performance of the circuit shown in Figure 1 is demonstrated on the EVAL-AD5760 evaluation board using an Agilent 3458A multimeter. Figure 2 shows that the integral nonlinearity is a function of DAC code and is within the ±0.5 LSB specification.
Figure 3 shows differential nonlinearity as a function of DAC code and is within the ±0.5LSB specification.
Noise drift measurement
To achieve high accuracy, the peak-to-peak noise at the output of the circuit must remain below 1 LSB, which is 152 μV for 16-bit resolution and a +10 V unipolar voltage range, and 305 μV for a 20 V peak-to-peak voltage range.
Practical applications will not have a high-pass cutoff frequency at 0.1 Hz to attenuate 1/f noise, but will include frequencies down to DC in their passband; therefore, the measured peak-to-peak noise is for a +10 V unipolar voltage The ranges are shown in Figure 4 and Figure 5 for the ±10 V bipolar voltage range. In both cases, the noise at the output of the circuit was measured over 100 seconds, and the measurements fully covered frequencies as low as 0.01 Hz.
Figure 4 shows the signal chain noise performance over the 10 V output range (1 LSB = 152 μV). A 10 V range is obtained by connecting the AD5760's V REFN input to ground.
The peak-to-peak output noise in the 10 V range in Figure 4 is summarized as follows:
Zero level = 0.96 μV pp = 0.006 LSB pp
Mid-level = 7.46 μV pp = 0.05 LSB pp
Full scale = 12.88 μV pp = 0.08 LSB pp
Noise is lowest at zero-scale output voltage, where the noise comes only from the DAC core simply because the V REFN input is connected to ground. When zero-level code is selected, the DAC attenuates the noise contribution of each reference voltage path.
At lower frequencies, temperature drift and thermocouple effects become sources of error. These effects can be minimized by selecting devices with smaller thermal coefficients. In this circuit, the main source of low-frequency 1/f noise is the reference voltage source. In addition, the temperature coefficient value of the reference voltage source is also the largest in the circuit, which is 2 ppm/°C.
Figure 5 shows the signal chain noise performance over the 20 V output range (1 LSB = 305 μV).
The peak-to-peak noise in the 20 V range in Figure 5 is summarized as follows:
Zero scale = 18 μV pp = 0.06 LSB pp
Mid-level = 2.47 μV pp = 0.008 LSB pp
Full scale = 9.22 μV pp = 0.03 LSB pp
Mid-level has the lowest noise because the DAC core has the greatest attenuation against the reference at this level.
The noise at zero scale is greater than the noise at full scale because the negative reference voltage passes through the extra buffer stage.
To view the complete schematic and printed circuit board layout, see the CN-0318 Design Support Package: www.analog.com/CN0318-DesignSupport .
Blockdiagram
All reference designs on this site are sourced from major semiconductor manufacturers or collected online for learning and research. The copyright belongs to the semiconductor manufacturer or the original author. If you believe that the reference design of this site infringes upon your relevant rights and interests, please send us a rights notice. As a neutral platform service provider, we will take measures to delete the relevant content in accordance with relevant laws after receiving the relevant notice from the rights holder. Please send relevant notifications to email: bbs_service@eeworld.com.cn.
It is your responsibility to test the circuit yourself and determine its suitability for you. EEWorld will not be liable for direct, indirect, special, incidental, consequential or punitive damages arising from any cause or anything connected to any reference design used.
Supported by EEWorld Datasheet